1.1- Systems Architecture Flashcards
What is the Fetch Execute (Decode) Cycle?
Followed by a processer to process an instruction.
What are the steps of the Fetch Execute Cycle?
1: Memory address in Program Counter copied to MAR
2: Program Counter increments and holds address of next instruction
3: Processor sends signal along address bus to mem address in MAR
4: Data in address sent along data bus to MDR
5: Data held in MDR copied to CIR (current instruction register)
6: Data in CIR decoded and executed. Result stored in Accumulator
Loop
What does the ALU do?
Arithmetic operations and logical operations (BOOLEAN)
What does the CU do?
Co-ordinates operations carried out by computer:
-Monitors hardware
-Controls input/output of data and devices
-Controls data flow (right place right time)
Sends control signals between:
-Memory Read
-Memory Write
-Hard Disk Drive Read
-I/O Write
What is a cache?
Very fast, very small amount of memory on processor chip. Acts as middleground between processor and main memory and is faster to reach than main memory. Holds commonly used instructions
Four CPU registers
PC (program counter)
MAR (memory address register)
MDR (memory data register)
ACC (accumulator)
What is a system bus?
Set of parallel wires connecting two or more independent components of a computer system to pass signals between.
-Data bus
-Address bus
-Control Bus
What is the function of the address bus?
Carries addresses from processor to main memory or other I/O devices
One directional
Processor generates an address
All data/instructions returned on data bus
What is the function of the data bus?
Carries data/instructions from main memory to processor or from other secondary storage to the processor
Bi directional
Data can be read written
What is the function of the control bus?
Control signals are sent along the control bus
-For example Memory Read and Memory Write
-This instructs which data will be travelling too/from memory
Define Von Neumann architecture
The design on which many general purpose computers are made.
Uses 5 special registers, utilising fetch execute cycle
Data and instructions are stored as binary data in primary storage
Define Program Counter
Holds location of next instruction/data address in memory
Define Memory Address Register
Contents of Program Counter are copied here then transferred along address bus
Define Memory Data Register
Once data/instructions fetched from memory address in main memory, they are placed in MDR
Define Accumulator
Results of calculations from ALU are placed in accumulator
