1 Flashcards
Smaller w gives
Higher R_on for the mosfet.
W and l are constant once fabricated
Ron exists when VGS is equal to threshold.
What region do mosfet use in on state
Triode
What region do mosfet use for off state
Cutoff
Before CMOS nmos and pmos logic gates were individually manufactured.
How to reduce capacitance in a mosfet
Make a deeper seperator to increase distance between n- and p- of semiconductor in substrate
Tie substrate to source for stuck diagrams if aeperare substrate doesn’t exist.
What is polysilicon
A crystal that is doped.
What is demorgans theorem
(A&B)! = A! + B!
(A+B)! =
What types of circuits do CMOS logic gates consist of
Pull-up and pull-down networks
What are combinational circuits?
Logic gates (and nor not etc)
What are sequential circuits?
Logic gates + clock signals (clock acts as synchronizer)
What two circuits do digital circuits compose of
Combinational and sequential circuits
What is the purpose of clock in sequential circuits
Makes sure signal arrives on time and operations are done on time.
What are pull up networks composed of
P channel mosfets
What are pull down networks composed of
N channel mosfets
Where is output on CMOS
Between pullup and pulldown network connection
How to create a CMOS logic gate based on boolean logic
- Analyze and simplify boolean equation y=(A&B)!
- Draw pull down network by using n channel mosfet.
- Draw complementary section (pull up network).
- Connect pull up network to power supply and pull down network to ground.
Multiplication in boolean logic means
Series in CMOS pull down network.
Addition (or) of boolean logic means
Parallel connection in NMOS pull down network of CMOS.
How to convert CMOS pull down network to pull up network.
Series = parallel and parallel = series.
N Channel mosfet is off when
Gate voltage is 0.
At every junction in a mosfet there is a capacitance.
Most dominant capacitance is gate capacitance in mosfet.
Capacitors are shortcomings of all speed performance of mosfet.
How do you create a CMOS OR gate?
Same as NOR gate, but with an inverter at the output.
How do you create a CMOS AND gate?
Same as CMOS NAND, but with an inverter at the output.
P channel transistors are larger than n channel transistors.
