Week 10 - Flash Memory Flashcards

1
Q

What are the 2 types of flash memory used in devices?

A

NAND

NOR

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2
Q

List the key features of Flash Memory

A
  • Non volatile
  • Only has 3 operations: PROGRAM, ERASE and READ
  • It has multiple write and erase cycles
  • It requires memory management such as wear levelling to maximise life
  • Can be found as a single chip or individual chips on a device PCB
  • But Multi Chip Package (MCP) more common now especially stacked MCP with just one physicalfootprint
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3
Q

What does flash memory use to store data as 1s and 0s?

A

The storage of non volatile data is due to the very large scale integration of floating gate transistors

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4
Q

Summarise how floating gate transistors work

A

A floating gate transistor is a type of electronic switch used in mobile devices to store and manipulate data.

It works by using a special gate (the “floating gate”) that can hold an electrical charge, even when power is turned off. Here’s how it works in simple terms:

Transistor Structure: A floating gate transistor is made up of several parts: a source, a drain, a control gate, and the “floating gate” which is isolated from the rest of the circuit by a thin layer of material (usually an oxide layer).

Storing Data: The floating gate can trap and hold electrical charges. When a voltage is applied to the control gate, it causes the electrons to move onto the floating gate. These electrons stay there, even after the voltage is turned off. The presence or absence of electrons on the floating gate represents data—either a 0 or a 1.

Reading Data: To read the data, the transistor checks whether the floating gate has electrons (charged) or not (uncharged). This affects how easily current can flow from the source to the drain, allowing the transistor to detect if it’s in one state (1) or another (0).

Erasing Data: To erase the data, a reverse voltage is applied, which causes the electrons to leave the floating gate, returning it to its uncharged state.

Why it’s Useful: Since the floating gate can retain the charge even without power, it makes flash memory reliable and non-volatile, meaning the data doesn’t get erased when the device is turned off.

In mobile devices, floating gate transistors are primarily used in memory chips like flash storage, which stores things like photos, apps, and system data, allowing the device to keep data even when you turn it off.

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5
Q

What are the differences between Single Layer Cell and Multi Layer Cell charges

A

SLC has a one bit value charge of 1 or 0

MLC stores multiple charge levels in a single floating gate. Achieved by precisely controlling the amount of charge stored, representing a two bit value per floating gate transistor, ranging from 00 - 11

TLC (Tri Level Cell) designed to store three bits of info per cell 000 - 111

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6
Q

How do the differences in SLC, MLC and TLC voltage storage affect the memory?

A

Advantages of MLC and TLC - increased storage capacity.

Disadvantages: Errors are more likely to occur in accurately representing the float gate values, over time it becomes harder to differentiate the float gate values and the cells will fail.

There is a limited life span for flash memory generally, due to the time they can hold data due to the deterioration of the voltage level holding in the float gate over time (between 10 and 100 years)

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7
Q

What is NOR memory?

A
  • Introduced by Intel in 1988 (prior there was just eprom or eeprom)
  • Slow erase cycle 900mS (compared to NAND)
  • Slow write cycle (compared to NAND)
  • Very fast read cycle (Compared to NAND)
  • Therefore used for system data
  • May be directly accessed by processor
  • Cells are bigger in size. More expensive to produce
  • Shorter performance life than NAND
  • Erase cycles 10,000 – 100,000
  • Less likely to suffer bit flipping
  • Requires a Nor Technology Driver (MTD) to conduct read write and erase operations
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8
Q

How does a NOR cell operate?

A

Input A Input B Output
0 0 1
0 1 0
1 0 0
1 1 0

The above truth table shows how a nor cell operates. So the only input values that give a nor logical output of 1 is two inputs of 0

Anything else gives a nor logical output of 0

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9
Q

What is NAND memory?

A
  • Toshiba introduced in 1989
  • Used in other flash media
  • Fast erase cycle 2mS
  • Fast read/write cycle
  • programs blocks of data at a time
  • Originally used for program data (pictures, video, audio files etc)
  • High cell density and capacity (popular choice for small spaces)
  • Lower in cost to produce than NOR
    *Suffers bit flipping and random bad blocks, So..
  • Requires memory management EDC/ECC techniques to protect data from corruption
  • Erase Cycles 100,000 – 1,000,000
    *cells are connected serially, so one connected group of cells can be read or written to simultaneously so is faster using less power for write intensive operations than nor.
    *Uses a shared bus for address and data transfer, nand can store more info per physical space than nor. Can use SLC, MLC or TLC
    *Flash page is lowest unit that can be addressed in NAND
    *Flash block is smallest unit that can be erased
    *Flash block usually consists of 32, 64, or 128 pages
    *The no of pages and block size is determind by the size of the flash memory
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10
Q

How do NAND cells operate?

A

Input A Input B Output
0 0 1
0 1 1
1 0 1
1 1 0

The above truth table shows how a NAND cell operates. So the only input values that give a NAND logical output of 0 is two inputs of 1

Anything else gives a nor logical output of 1

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11
Q

Programming in Flash memory

A

Programming can only occur in flash memory from an initial state of 1 to a zero. It cannot be programmed from 0 to 1.

The only way to change a 0 to a 1 is that the whole block must be erased resulting in all 1s again.

This then leaves the re-initialised block and its associated pages as all cells having values of 1s

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12
Q

What is the Flash Memory structure?

A

Flash memory is organised into pages and blocks

Within each block is a series of pages where the data is stored

The numbers of pages per block vary in multiples of 32, 64, 128 etc

Numbers of blocks and page size is determined by the flash memory

Data is stored in the data area of pages in multiples of 512 bytes.

A page also has a spare area (also called out of bounds or redundant space - contains functions like bad block marking and error control). uses page sizes are referred to ignoring the size of the spare area

The flash page is the lowest unit that can be addressed in NAND

Block is the smallest area that can be erased.

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13
Q

Page and Block Sizes

A

Page sizes vary in multiples of 512 bytes (excl the spare area size)

Block sizes vary depending on size of the mem chip but typically are 32 pages, 64 pages or 128 pages

If page size is 512 bytes the spare area is 16 bytes

If page area is 2048 bytes the spare area is 64 bytes

If page area is 4096 bytes the spare area is 128 bytes

Spare area size is usually between 8 and 128 bytes dependent on page side.

Spare area contents is chip manufacturer specific but often is the erase block, the page it belongs to as well as mapping the physical page location to the logical location via the flash translation layer. Can also hold a dirty bit marker, as well as error correction info

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14
Q

Error Correction Methods

A
  1. Error Correction Codes (ECC)

Error Correction Codes (ECC) are the most widely used method to detect and correct errors in flash memory. ECC works by adding extra bits (redundancy) to the data to allow the system to detect and correct errors.

Hamming Code: One of the simplest ECC schemes, the Hamming code adds extra parity bits to the data, allowing the detection of single-bit errors and the correction of them. However, it’s limited in the number of errors it can correct. Most common error correction in SLC

BCH Code (Bose–Chaudhuri–Hocquenghem): This is a class of cyclic error-correcting codes that can correct multiple bit errors in flash memory. BCH codes are often used in more complex systems requiring more robust error correction like MLC or TLC

  1. BAD BLOCK MANAGEMENT
    In flash memory, some blocks may become defective during manufacturing or over time due to wear and environmental factors. These bad blocks cannot reliably store data and must be isolated from the active memory pool. Bad block management is a system of tracking these blocks and avoiding them during writes.
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15
Q

First generation flash memory

A

In these days it was expensive.

just contained a NOR chip and a RAM chip.

NOR chip contained OS and user data which was written to the RAM on start up. The sim was also used as storage for some user data

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16
Q

Second generation flash memory

A

NOR, RAM and NAND

NOR for OS
RAM temp execution of code
NAND for user data

17
Q

Third generation flash memory

A

NAND and RAM (DRAM) chips
This reduces the component footprint on the PCB and allows a greater throughflow of data. Allows for greater density of storage and reduced cost

NAND for OS and user data

DRAM is the type of RAM used for fast code execution

18
Q

The flash translation layer

A

The processor communicates with the flash memory via a BUS. The micro processor cannot interface directly with the NAND memory. In order for the processor to see the NAND memory it communicates via the flash controller.

The Flash controller facilitates read and write functions and other functions like wear levelling, translation of logical block and physical addressing. The flash controller essentially provides a virtual map of the physical data stored in the NAND memory

The Flash Translation Layer (FTL) is the function used to carry out the various memory management techniques carried out by the flash controller. So is responsible for managing how data is stored and erased on the flash memory. It ensures that:

Data is stored in a way that the system thinks it is in the correct location, even though it’s actually moved around to improve performance.

Flash memory doesn’t wear out too quickly by spreading the writing and erasing across the memory evenly (wear leveling).

Old or deleted data is properly erased and space is freed up for new data (garbage collection), at block level. So pages that are marked as dirty (ready for erasing) get moved to blocks ready for erasing the whole block of dirty pages. Erase function takes longer than read or write.

Without the FTL, the device would not be able to efficiently manage flash memory, leading to slower performance, data corruption, and quicker memory wear.