Von Neumann Flashcards

1
Q

What is the von Neumann model and how many components does it have?

A

A fundamental model of a computer for processing computer programs.
5.

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2
Q

instruction

A

the smallest piece of work specified in a computer program

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3
Q

Address space

A

The total number of memory locations (“boxes”) available.

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4
Q

MAR

A

memory address register;
address of location to be accessed
sets up the decoder circuitry in the memory.

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5
Q

Addressability

A

he number of bytes of memory referenced by a given address.

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6
Q

MDR

A

memory data register;

where the contents of the MAR is placed into.

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7
Q

How to store a value in a memory location

A

First, write the address of the memory location in MAR, and the value to be stored in MDR. Then, go through the computer’s memory with the WE signal asserted. The information contained in the MDR will be written onto the memory location in MAR.

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8
Q

Processing unit

A

A unit in the vM model that does the instructions, specializing in one complex function.

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9
Q

What are the basic components of a processing unit?

A

ALU and General Purpose Registers (TEMP)

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10
Q

ALU

A

The Arithmetic and Logic Unit;
capable of performing basic arithmetic.
The ones for LC-3 include ADD, AND, NOT and Pass Through

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11
Q

What is the word length of the LC-3?

A

16 bits

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12
Q

Word length

A

Size of the quantities normally processed by the ALU

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13
Q

Which ISAs have their own word length, and what does it depend on?

A

All of them.

It depends on the intended use of the computer

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14
Q

What are the Registers (TEMP) used for on the Processing unit?

A

Fast “on-board” storage for a small number of words.

Close to the ALU allows for intermediate data storage while processing (much faster access than RAM).

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15
Q

Control unit

A

Keeps track of which instruction is being executed.

It fetches & decodes each instruction, and sets up the appropriate inputs for the Memory, Processing, and I/O.

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16
Q

PC

A

Program Counter, aka the Instruction Pointer;

Holds the address of the next instruction to be fetched.

17
Q

IR

A

Instruction Register,

Holds the instruction currently being executed.

18
Q

Steps of Fetch

A

PC -> MAR
PC -> PC + 1
Mem[MAR} -> MDR
MDR -> IR

19
Q

Fetch

A

Read an instruction from memory.

20
Q

Decode

A

Examines the instruction in order to figure out what the microarchitecture is being asked to do

21
Q

Evaluate address

A

Computes the address of the memory location that is needed to process the instruction

22
Q

Fetch operands

A

Obtains the source operands needed to process the instruction.
Operands can come from Registers or RAM, or be embedded in the instruction itself.

23
Q

How is the Effective Address (EA) determined?

A

By the Evaluate address step;
computing the address of the operand (if any), or of the memory location to be accessed: e.g. the location from which to obtain a value.

24
Q

Where do you store results?

A

Register or Memory
e.g.
LD.REG
MEM.EN/W

25
Q

Do all instructions require all six steps? If not, which and why?

A

No.
If only using registers, skip Evaluate Address
If only moving data, skip Execute

26
Q

Types of instructions

A

Data movement, Control, and Operate