unit 6 single-Cycle Processor: Daatpath Flashcards
covers 7.1 7.2 and 7.3 of the Sarah Harris and David Harris (2015) Digital Design and Computer Architecture - ARM Edition, Elsevier
microarchitecture
the connection between logic and architecture. T
microarchitecture is the specific arrangement of
registers, ALUs, finite state machines(FSMs), memories, and other logic building blocks.
architectural state for the ARM processor consists of?
16 32-bit registers and the status register
what are ADD, SUB, AND, and ORR
data processing instructions
what are LDR and STR?
Memory instructions
B stands for?
branch
how do we divide our microarchitectures?
int two interacting parts: the datapath and the control unit
what does the data path operate on?
words of data
what does a datapath contain?
structures such as memories, registers, ALUs, and multiplexers
what is the size of the 32-bit ARM architecture’s datapath?
32-bit
where does the control unit receive instructions from?
the current instructions are received from the datapath
what does the control unit tell the datapath?
how to execute the instructions it receives
how does the control unit control the operation of the datapath?
it produces multiplexer select, register enable, and memory write signals
what are heavy lines used to indicate?
32-bit data busses
what are medium lines used to indicate?
narrower busses, such as 4 bit address busses on the register file
what do narrow lines indicate?
1-bit buses
what do blue lines represent?
control signals, such as the register file write enable
what does the program counter(PC) do?
it outputs points to the current instruction
what is PC’?
its the input for PC and it indicates the address of the next instruction
how many read ports does the instruction memory have?
a single read port. It takes a 32-bit instruction address input A, and reads the 32-bit data from that address on the read data out, RD
what registers does the 15-element x 32-bit register file hold?
R0-R14 and has an additional input to receive R15 from the PC.
what are the Register file ports?
two read ports and one write port
what kind of input do the read ports take?
4-bit address inputs
how many ports does the data memory have?
a single read/ write port
if the write enable is 0 what happens?
it reads address A onto RD
the instruction memory, register file, and data memory are all?
read combinationally, meaning if the address changes, then the new data appears at RD after some propagation delay; no clock is involved
a single-cycle microarchitecture executes an entire instruction in?
one cycle
a multicycle microarchitecture executes an entire instruction in?
a series of shorter cycles
pipeline microarchitecture applies a_____ to____?
pipeline, to the single-cycle microarchitecture. executing multiple processes at the same time
