unit 6 single-Cycle Processor: Daatpath Flashcards
covers 7.1 7.2 and 7.3 of the Sarah Harris and David Harris (2015) Digital Design and Computer Architecture - ARM Edition, Elsevier
microarchitecture
the connection between logic and architecture. T
microarchitecture is the specific arrangement of
registers, ALUs, finite state machines(FSMs), memories, and other logic building blocks.
architectural state for the ARM processor consists of?
16 32-bit registers and the status register
what are ADD, SUB, AND, and ORR
data processing instructions
what are LDR and STR?
Memory instructions
B stands for?
branch
how do we divide our microarchitectures?
int two interacting parts: the datapath and the control unit
what does the data path operate on?
words of data
what does a datapath contain?
structures such as memories, registers, ALUs, and multiplexers
what is the size of the 32-bit ARM architecture’s datapath?
32-bit
where does the control unit receive instructions from?
the current instructions are received from the datapath
what does the control unit tell the datapath?
how to execute the instructions it receives
how does the control unit control the operation of the datapath?
it produces multiplexer select, register enable, and memory write signals
what are heavy lines used to indicate?
32-bit data busses
what are medium lines used to indicate?
narrower busses, such as 4 bit address busses on the register file