Unit 1 Pg Online Flashcards

1
Q

What is the fetch-execute cycle?

A

Processors operate in defined stages to carry out program instructions repeatedly.

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2
Q

What is the accumulator in a processor?

A

A general purpose register used to temporarily store results of calculations.

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3
Q

What does the Arithmetic-Logic Unit (ALU) do?

A

Performs arithmetic, logical, and shift operations on data.

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4
Q

List the arithmetic operations performed by the ALU.

A
  • Add
  • Subtract
  • Multiply
  • Divide
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5
Q

What logical operations does the ALU perform?

A
  • AND
  • OR
  • NOT
  • XOR
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6
Q

What are shift operations in the context of the ALU?

A

Move bits to the left or right within a register.

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7
Q

What does the control signal ‘Memory read’ do?

A

Causes data from the addressed location in RAM to be placed on the data bus.

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8
Q

What is the function of the control signal ‘Memory write’?

A

Causes data on the data bus to be written into the addressed location in RAM.

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9
Q

What does the control signal ‘Bus request’ indicate?

A

Indicates that a device is requesting use of the data bus.

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10
Q

What does the control signal ‘Bus grant’ signify?

A

Indicates that the CPU has granted access to the data bus.

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11
Q

What is the role of the clock in a processor?

A

Used to synchronize operations.

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12
Q

What is a bus in computer architecture?

A

A series of connectors that transfer signals between internal components.

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13
Q

How many lines do buses typically consist of?

A

8, 16, 32, or 64 lines.

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14
Q

What is the function of the Control Unit in a processor?

A

Coordinates the activity of all other components.

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15
Q

What are the main components of the Central Processing Unit (CPU)?

A
  • Control Unit
  • Buses
  • Arithmetic-Logic Unit (ALU)
  • Dedicated registers
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16
Q

What is the purpose of dedicated registers in a processor?

A

To hold various pieces of information required for executing instructions.

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17
Q

What does the Program Counter (PC) hold?

A

The memory address of the next instruction to be executed.

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18
Q

What is stored in the Current Instruction Register (CIR)?

A

The current instruction, split into opcode and operand.

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19
Q

What is the role of the Memory Address Register (MAR)?

A

Holds the address in memory where data is fetched or stored.

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20
Q

What does the Memory Data Register (MDR) temporarily hold?

A

Data moving between the processor and main memory.

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21
Q

Fill in the blank: The _______ is used to hold intermediate results of an instruction.

A

Accumulator

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22
Q

What happens during the fetch stage of the fetch-execute cycle?

A

The address of the next instruction is copied from the PC to the MAR.

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23
Q

What is the sequence of steps involved in the fetch stage?

A
  • Copy address from PC to MAR
  • Copy instruction to MDR
  • Increment PC
  • Copy MDR to CIR
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24
Q

What occurs during the decode stage of the fetch-execute cycle?

A

The instruction in the CIR is decoded and split into operand and opcode.

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25
Q

What does the opcode specify?

A

The operation that is to be carried out.

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26
Q

What does the operand hold?

A
  • Address of the data to be used
  • Actual data to be operated on
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27
Q

What happens during the execute stage of the fetch-execute cycle?

A

The instruction is executed and the result is held in the accumulator or stored in memory.

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28
Q

Name the three buses making up the system bus.

A
  • Control bus
  • Address bus
  • Data bus
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29
Q

Name five special registers involved in the fetch-execute cycle.

A
  • Program counter (PC)
  • Current Instruction Register (CIR)
  • Memory Address Register (MAR)
  • Memory Data Register (MDR)
  • Accumulator
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30
Q

What is the data bus?

A

The data bus is bi-directional as data can be sent both ways along the bus.

31
Q

What determines the width of the data bus?

A

The width of the data bus is defined by the number of wires or lines it contains.

32
Q

What happens if the data bus is the same width as a computer word?

A

Data can be transferred to and from memory in a single operation.

33
Q

What does the width of the address bus determine?

A

The maximum possible memory addresses of the system.

34
Q

What is the maximum number of memory addresses with an 8-bit address bus?

A

256 (2^8).

35
Q

What is the memory capacity of an average PC in GiB?

36
Q

How many bytes are in 4 GiB?

A

2^32 bytes.

37
Q

What must the address bus be for a PC with 4 GiB of memory?

A

32-bit address bus.

38
Q

What is a word in memory?

A

Memory is divided up in equal units called words.

39
Q

What are common word lengths?

A
  • 8 bits
  • 16 bits
  • 32 bits
  • 64 bits.
40
Q

What is the fetch-execute cycle?

A

The process where the CPU fetches, decodes, and executes instructions.

41
Q

What factors affect the performance of the CPU?

A
  • Clock speed
  • Number of cores
  • Cache.
42
Q

What is cache memory?

A

A small amount of superfast (but expensive) memory that stores data and instructions recently used by the processor.

43
Q

What is the difference between Level 1 and Level 2 cache?

A

Level 1 cache is faster but smaller than Level 2 cache.

44
Q

What is assembly language?

A

A low-level programming language closely related to machine code.

45
Q

What is the basic structure of a machine code instruction?

A

It consists of an operation code and an operand.

46
Q

What does the maximum size of the operand depend on?

A

The width of the address bus.

47
Q

What is pipelining?

A

A technique used to improve performance by overlapping stages in the fetch-execute cycle.

48
Q

What is parallel processing?

A

Using several processor cores working at the same time on different parts of the same task.

49
Q

What is a dual-core computer?

A

A computer with two processors linked together in the same integrated circuit.

50
Q

What is the theoretical advantage of a quad-core computer over a single-core computer?

A

It can be two or even four times faster.

51
Q

What is the function of the system clock?

A

To synchronize the operations of the processor components.

52
Q

What happens on the rising edge of the clock?

A

Actions are usually carried out.

53
Q

How does clock speed affect performance?

A

The faster the clock speed, the faster a computer can fetch, decode, and execute instructions.

54
Q

What is the frequency of a 4GHz processor in ticks per second?

A

4 billion times per second.

55
Q

What is the purpose of cache memory being split into instruction cache and data cache?

A

So that data and instructions can be fetched simultaneously.

56
Q

What is the benefit of having more cache memory?

A

It increases the likelihood that the next instruction or data will already be in cache.

57
Q

What is a co-processor?

A

An extra processor used to supplement the functions of the primary processor (the CPU)

It may perform floating point arithmetic, graphics processing, digital signal processing and other functions.

58
Q

What are contemporary processor architectures characterized by?

A

Incorporation of both von Neumann and Harvard architecture principles

Modern CPU chips often have a single main memory but divided cache memory.

59
Q

What is the main memory structure in traditional desktop computers?

A

One main memory for holding both data and instructions

Cache memory is divided into instruction cache and data cache.

60
Q

What is the primary difference between von Neumann and Harvard architectures?

A

Von Neumann architecture uses a single memory for both data and instructions, while Harvard architecture uses separate memories

This allows Harvard architecture to avoid bottlenecks.

61
Q

Which architecture is commonly used in PCs, laptops, and servers?

A

Von Neumann architecture

It is based on the shared memory model.

62
Q

What is a bottleneck in the context of processor architecture?

A

A situation where one bus for data and instructions limits performance

This occurs in von Neumann architecture.

63
Q

What are the advantages of von Neumann architecture?

A
  • Cost-effective
  • Simplifies Control Unit design
  • Accesses data and devices in the same way

Almost all general-purpose computers are based on von Neumann principles.

64
Q

What is the purpose of Harvard architecture?

A

To use different sized memories and word lengths for data and instructions

It is commonly used in embedded systems and digital signal processing.

65
Q

What is the key difference between CISC and RISC?

A

CISC uses a large instruction set, while RISC uses a minimal number of simple instructions

CISC aims to reduce lines of assembly language; RISC focuses on efficiency in clock cycles.

66
Q

How is multiplication performed in CISC versus RISC?

A

CISC: MULT A, B; RISC: LDA R1, A; LDA R2, B; MULT R1, R2; STO R1 A

RISC requires multiple steps to accomplish the same task.

67
Q

What is a GPU?

A

A Graphics Processing Unit is a specialized electronic circuit efficient at manipulating graphics and image processing

It consists of thousands of small cores designed for parallel processing.

68
Q

What are the functions of a GPU?

A
  • Accelerate scientific and engineering applications
  • Process large blocks of visual data simultaneously

GPUs are used in various devices from mobile phones to supercomputers.

69
Q

What are multi-core systems known for?

A

Distributing workload across multiple processor cores to achieve higher performance

They are common in personal computers and mobile devices.

70
Q

What are the advantages of RISC architecture?

A
  • Simpler hardware
  • Each instruction takes one clock cycle
  • Better performance at lower costs due to efficient RAM usage

Pipelining is possible due to uniform instruction timing.

71
Q

What is the stored program concept?

A

A program must be loaded into main memory to be executed by the processor

Instructions are fetched, decoded, and executed sequentially.

72
Q

What is a key characteristic of multicore processors?

A

They can perform several tasks in parallel

This significantly increases performance.

73
Q

What is the role of the Control Unit in processor architecture?

A

To manage the execution of instructions and control data flow

Its design complexity varies between von Neumann and Harvard architectures.

74
Q

Fill in the blank: The two main types of instruction set are ______ and ______.

A

[CISC], [RISC]