This class was created by Brainscape user Ciara Brady. Visit their profile to learn more about the creator.
By:
Ciara Brady
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Decks in this class (15)
ALU ,CU ,Registers And Busses
What does the control unit do 1,
What does the program counter do 2,
What does the memory address regi...
10
cards
Fetch, Decode, Execute Cycle
What happens during the fetch sta...,
What happens during the decode st...,
Opcode 3
6
cards
Performance Of The CPU
What factors affect the performan...,
How does clock speed affect cpu 2,
What is cache 3
6
cards
Pipelining
How does pipelining work 1,
Why use pipelining 2,
How can pipelining be efficient 3
6
cards
Von Neumann And Harvard
Contemporary processing 1,
Key features of von neumann archi...,
Key features of harvard architect...
6
cards
Cisc Vs Risc
What is an instruction set 1,
Cisc features 2,
Risc features 3
3
cards
GPUs And Their Uses
What is a co processor 1,
Purpose of a co processor 2,
Gpu related to cores 3
6
cards
Multicore And Parallel Systems
Multi core processor 1,
Performance of multi core process...,
Limitations of multi core 3
7
cards
Physics And Maths Tytpr
Accumulator 1,
Address bus 2,
Alu 3
9
cards
SLR 3
Define drive 1,
Define media 2,
Define optical storage 3
28
cards
Data types
What does an and operator do mask 1,
And 1 and 0 meaning 2,
What does an or operator do mask 3
38
cards
Types Of Programming Language
0
cards
Unit 1 Pg Online
What is the fetch execute cycle 1,
What is the accumulator in a proc...,
What does the arithmetic logic un...
74
cards
Unit 8
Blank 1
1
cards
Data Structures
Tuple properties 1,
Define dynamic 2,
Define static 3
43
cards
More about
CS Alevel
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