Unit 1 - October 4 Flashcards
Control Unit
Coordinates and manages flow of data in the CPU
Controls flow of data between inputs and output devices
Manages buses
Control bus
Send control signals to coordinate components
Provides status information
Cir
Divides instructions into
OPCODE- type of instructions
OPERAND - data/data address
Cache levels
Level 1 - very fast , very small
Level 2 - moderately fast , moderate capacity
Level 3 - slowest , largest capacity
Pipelining
Reduced time cpu is idle
Instruction pipeline - separates into fde stages
Arithmetic pipelining - overlaps arithmetic operations
Holds data in buffers
Within one core
Von Neumann benefits
Cheaper
Cu easier to design
Programs can be optimised in size
Harvard architecture benefits
Data and instructions can be transferred simultaneously so execution is faster
Memories can be different sizes , so space usage more efficient
CISC
Complex +larger instruction set (more complex logic gates on chip)
Complex structure means more energy usage and more expensive
Used in embedded systems
RISC
Simple structure due to smaller instruction set
Allows pipelining as each instruction takes 1 clock cycle to to process
Requires more assembly lines so more work for compiler
Used in portable devices
GPU
Lots of individual processors, working in parallel
Efficient when performing repetitive tasks (image processing)
Uses co-processors to supplement activities
Parallel processing
Can be multi core or a single core with multiple processors
Multi core have shared cache and inter core communication
Have a schedular to keep in sync
Input devices
Pointing Barcode and pen type readers Laser scanner Sensor (monitor and control) Eyetyper
Output devices
Printer - dot matrix, inkjet, laser, Braille
Monitor - OLED, LED
Projector
Speaker
BIOS
First instructions of computer, start the OS
Basic input output system
Solid state examples
Ssd - programs data files of OS
Sd card - memory on small devices
Memory stick - back-ups, file transfer
