Topic 2 Theory Flashcards
4 CPU components
Memory Address Register (MAR)
- Specifies address in memory for the next read or write.
Memory Buffer Register (MBR)
- contains data read/write from/to memory
Program counter
- keeps track of the memory address of the next instruction to be fetched and executed.
Instruction Register
- holds the current instruction being executed, loaded with contents of the memory address pointed by program counter.
4 action categories in Instruction Register (IR)
Processor-memory,Processor-I/O, Data processing, Control
4 Classes of Interrupts
Program Interrupts, Timer Interrupts, I/O Interrupts, Hardware Failure Interrupts
Sequential Interrupt Approach
Disables interrupts when interrupt is being processed, handled in sequential order.
check for secondary interrupts before resuming user program.
Nested interrupt Approach
Define priorities for interrupts. Higher priority interrupts are handled first, higher the number, higher the priority.
Characteristics of memory
Capacity and Performance
What affects the performance of memory?
Access time, memory cycle time and transfer rate
Physical characteristics of memory
Volatile,non-volatile,nonerasable,erasable
Volatile memory
data decay naturally or lost when there is no power supply
non-volatile memory
no electrical power needed to retain data
nonerasable memory
cannot be altered unless destroying storage units. Eg(Read-Only Memory) ROM
Erasable memory
can be altered and erased from storage
Physical characteristics of Semiconductor and magnetic-surface memory
Semiconductor: volatile or non-volatile.
Magnetic: non -volatile
Memory Hierarchy tradeoffs
Lower access time, Higher cost per bit
Larger capacity, lower cost per bit
Larger capacity, Higher access time
Memory hierarchy from top to bottom
CPU,Registers,Cache,Multiple cache levels,Main Memory, (DRAM,SDRAM,DDR-SDRAM), SSD, Flash memory, Virtual memory and file/database memory/Magnetic Disk, Offline Bulk Memory, Magnetic Tape
