Timers Flashcards

1
Q

A _____ count is used to obtain a 1 second timer from a 30MHz clock?

A

30000000

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2
Q

‘A’ must be ___ to make a 40% duty-cycle, if ‘B’ is 30ms. (ensure you include the units too) find the pic i cannot add lol

A

74ms

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3
Q

The count-down timer free-running mode means:

Counter counts down to 0 then begins counting up

Counter wraps back around to 0 after hitting a maximum value

Counter counts down from maximum to 0 and then stops automatically

Counter wraps back around to maximum after counting down to 0

A

Counter wraps back around to maximum after counting down to 0

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4
Q

The watchdog timer (WDT) is designed to restart a system if the software crashes

True
False
A

True

The watchdog timer (WDT) is designed to restart a system if the software or system becomes unresponsive or crashes. It operates as a hardware timer that needs to be periodically reset by the software. If the software is running correctly, it will reset the watchdog timer at regular intervals. However, if the software becomes unresponsive or fails to reset the timer within a specified time frame, the watchdog timer will trigger a system reset to bring the system back to a known, functional state. This feature is valuable in embedded systems to enhance system reliability and fault tolerance.

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5
Q

Inside a microcontroller, a “timer” is a/an …:

software that implements a stopwatch function.

ISR that is triggered by the RTC

counter that can run down or up.

built-in clock unit.

A

counter that can run down or up.

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6
Q

CPU can execute other code while the timer is running concurrently.

True
False
A

True

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7
Q

A 1Hz clock is:

generated using a crystal that emits a signal at 32.768kHz

generated using a counter that counts till 215

directly used as the main clock

used by the Real Time Clock

A

generated using a crystal that emits a signal at 32.768kHz

generated using a counter that counts till 215

used by the Real Time Clock

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8
Q

2 main things happening in an ADC device?

A
  1. Sample the input voltage (take a snapshot)
  2. Quantise the sample into binary
    (and 3. Provide the digital sample to the CPU when asked)
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9
Q

The programmer configures (a) the clock source, (b) the duty-cycle, and (c) polarity. Once running, it continues stand-alone.

e.g. setting period=10, duty_cycle=4, polarity=low

What is the actual duty cycle?

A

Actual duty cycle (%) = (period – duty_cycle)/period * 100

For this example it is (11 - 5)/11 = approx 55%

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10
Q
A
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