The characteristics of contemporary processors, input, output and storage devices Flashcards
What is the Control unit? What are some of its roles?
Component of processor which directs operations of the CPU
-Decoding instructions
-Accepting next instruction
-Manages flow of data between CPU and other devices
-Stores resulting data back in memory
Coordinating activities of CPU
What is meant by the term ‘buses’?
They are a set of parallel wires which connect two or more components inside the CPU
Name the buses in the CPU
-Data bus
-Address bus
-Control bus
What is meant by the ‘bus width’?
The number of parallel wires a bus has
-Buses are typically 8,16,32 or 64 wires wide
The bus width is directly proportional to…
the number of bits that can be transfered simultaneously at any given time
(so bus width of 8 bits means 8 parallel buses as only one bit can be transfered per bus at a time)
Data bus
Its a bidirectional bus used for transporting data and instructions between components
What is meant by a ‘bidirectional bus’?
Bits can be carried in both directions
Address bus
This bus is used to transmit the memory addresses which specify where data is to be sent to or retrieved from
The width of an address bus is..
directly proportional to the number of addressable memory locations
(as more bits can represent more memory address combinations)
Which buses are bidirectional and which ones are unidirectional?
Bidirectional = Data bus, Control bus
Unidirectional = Address bus
Control bus
This is a bidirectional bus
-Used to transmit control signals between internal and external components
-Coordinates the use of the data and address buses
-Provides status info between system components
Give examples of control signals
Transmitted using control bus
-Memory read
-Memory write
-Bus grant
-Bus request
-Clock signal (used to synchronise operations)
-Interrupt request (shows device is requesting access to CPU)
What is meant by a memory read and write control signal?
-Memory read
The CPU uses the address bus to specify the memory location (address) from which data is to be read.
The control bus sends a signal (e.g., READ) to indicate that a memory read operation is taking place.
The data at the specified memory location is placed on the data bus and transferred to the CPU.
-Memory write
The CPU uses the address bus to specify the memory location (address) where the data will be written.
The control bus sends a signal (e.g., WRITE) to indicate that a memory write operation is occurring.
The data to be written is placed on the data bus and transferred to the specified memory location.
What is meant by a bus grant and a bus request control signal?
Bus request = Device is requesting use of a bus
Bus grant = CPU has granted access to a bus to a device
Assembly language
Uses mnemonics to represent instructions
-Simplified way of representing machine code
-Instruction is divided in the CIR into opcode and operand
What is the difference between opcode and operand?
Opcode= The type of instruction to be executed (eg ADD)
Operand= Data or address of the data which the operation is to be carried on
Some bits in the operand are addressing modes
What is pipelining?
Two types: Instruction and arithmetic pipelining
-The process of completing the FDE cycles of 3 separate instructions simultaneouly
-Aimed at reducing the amount of the CPU which is kept idle.
—Holding some data in a buffer close to the CPU until its required
—While one instruction is being executed another can be decoded and another can be fetched
What is the difference between arithmetic and instruction pipelining?
Instruction=Improves the execution of instructions carried out by CPU: Separating instruction into fetching, decoding and executing and overlapping these stages for each instruction
Arithmetic= Used in arithmetic operations: Breaking down the arithmetic operations and overlapping them as they are performed for each instruction
What does pipelining aim to do?
Aimed at reducing the amount of CPU which is kept idle (unused/inactive)
What is meant by the FDE cycle?
Sequence of operations that are completed in order to execute an instruction
What happens in the Fetch stage of the FDE cycle?
- Program Counter holds the memory address of the next instruction to be fetched which is transferred to the Memory Address Register (MAR) via the address bus, which is used to specify the location in memory to fetch the instruction from. The address bus passes this into memory
- The Control Bus sends a signal to memory, instructing it to read the value at the address specified in the MAR.
The instruction stored at that memory address is fetched from main memory (RAM). - Data bus carries the instruction from the memory location to the Memory Buffer Register (MBR)
- After the instruction is fetched, the Program Counter (PC) is incremented to point to the next instruction. This ensures that the next cycle fetches the correct instruction from the next memory address.
What happens in the Decode stage of the FDE cycle?
- The instruction fetched from memory in the Fetch stage is now stored in the current Instruction Register
- The instruction is split up into two parts:
Opcode: The operation to be performed (e.g., ADD, SUB).
Operand: The data or memory address the operation will act upon (e.g., a number or a memory location). - Control Unit decodes the opcode part of the instruction. The opcode tells the Control Unit what operation is needed
Based on the opcode, the Control Unit generates the appropriate control signals to carry out the operation. For example: - Control Unit prepares the Arithmetic Logic Unit (ALU) or other functional units for the operation defined by the opcode.
What happens in the Execute stage of the FDE cycle?
Decoded instruction is executed
This can be: (if its a calculation)
Control Unit sends control signals to the relevant parts of the CPU to carry out the operation defined by the opcode (instruction type).
Control Unit ensures that the correct ALU operation is triggered, or that the correct memory or register operation is performed.
Give me factors affecting CPU performance
-Clock speed
-Number of cores
-Cache (amount and type of cache memory)
-Address bus width
-Data bus width
Explain how the clock speed affects the perfomance of the CPU
Clock speed is determined by system clock
Clock speed is the number of clock cycles per second
-System clock generates signals alternating between 0 and 1 (clock tick)
More clock cycles= more instructions carried out per second
Explain how the number of cores affects the perfomance of the CPU
Each core acts as an independent processor that can execute tasks in parallel
More cores=More Tasks Simultaneously: Each core can execute its own task at the same time.
(e.g 2 cores=2 tasks)
Explain how the cache affects the perfomance of the CPU
Cache is the CPU’S onboard memory
-Instructions frequently fetched from main memory are copied to the cache so if they are need again the can be accessed quicker.
-Before looking in main memory first look inside the cache
-As the cache fills up unused instructions are replaced
What happens as cache fills up?
Unused instructions are replaced
Level 1 cache type
Very fast memory cells with small capacity
Level 2 cache type
Relatively fast memory cells with medium capacity
Level 3 cache type
Slower memory cells with large capacity
Von Neumann architecture
Includes basic components of a computer and processor such as single CU, ALU, registers and memory units
SHARED memory and SHARED data bus is used for both data and instructions
The CPU fetches instructions and data from the same memory in a sequential manner, meaning it reads and executes one instruction at a time.
Von Neumann architecture is built on the stored program concept
Von Neuman architecture is built on the…
stored program concept
Harvard architecture
Physically separate memories for instructions and data, so it allows instructions to be fetched and executed at the same time (good for parallel processing)
Used more commonly in embedded processors
This is useful for when memories have different characteristics
What came first RISC OR CISC?
CISC processors where used as a standard at first but they got replaced with RISC with time
Know CISC are more used in embedded systems and microcontrollers
What does RISC stand for?
Reduced instruction Set Computers
What does CISC stand for?
Complex instruction Set Computers
RISC
REDUCED INSTRUCTION SET COMPUTERS
In these processors there is a SMALL instruction set
-Each instruction is approximately one line of machine code and takes one clock cycle
CISC
COMPLEX INSTRUCTION SET COMPUTERS
In these processors there is a LARGE instruction set, these instructions are built into the hardware
-Aim is to try and complete tasks in as few lines of assembly code as possible
-Used in microcontrollers and embedded systems
Comparison between RISC and CISC
RISC: Compiler does more work to translate HL code into MC because each operation (e.g., load, add, store) is broken down into multiple simple instructions.
CISC: Compiler does less work to translate into MC because a single CISC instruction can perform complex operations, reducing the number of instructions needed.
RISC: More RAM required to store code
CISC: Less RAM required (as code is longer)
RISC: Each instruction typically takes one clock cycle to execute.
CISC: Instructions can execute multi-step operations in a single instruction.
so:
RISC: Pipelining is possible as each instruction takes one clock cycle
CISC: Not possible as some operations might take multiple clock cycles.
What is meant by a multi-core CPU?
A single physical processor that contains two or more independent processing units ( cores).
Each core can complete instructions separately or collaborate on shared tasks==> Results in better performance
What performs better and when multi-core systems or parallel systems? And why?
Multicore perform better in larger projects
Because:
Multi-Core Systems: Each core can perform tasks independently or collaboratively. (good for multithreaded systems)
Parallel Systems (Single-Core): A single-core processor relies on time slicing, where tasks are split into chunks and it appears as though multiple tasks are being executed simultaneously, but in reality, the processor is performing one task at a time.This introduces context switching overhead, making it less efficient for multi-threaded or heavy workloads
Describe the principles of Optical devices
These devices are read from and written to using a laser light
Laser shines on top of disc
Binary info is arranged in a spiral track. The laser starts reading from the inner edge and moves outward in a continuous spiral.
Pits scatter light they represent 0
Lands reflect light they represent 1
R: During reading, the laser shines on the disc, and the sensor detects the variations in light reflection caused by the pits and lands. The pattern of reflected and scattered light is interpreted as binary data.
W: When data is written, the laser alters the surface of the disc by creating pits and lands according to the encoded binary information.
Reading from optical devices
-Laser shines on top of disc
-Binary info is arranged in a spiral track.
-The laser starts reading from the inner edge and moves outward in a continuous spiral.
-A sensor detects the variations in light reflection caused by the pits and lands.
-The pattern of reflected and scattered light is interpreted as binary data.
-Pits scatter light they represent 0
-Lands reflect light they represent 1
Writing to Optical devices
When data is written, the laser shines on top of the disk which alters its surface by creating pits and lands according to the encoded binary information.
Where:
Pits scatter light they represent 0
Lands reflect light they represent 1
“What happens when a program or file is opened and how does RAM manage it?
- When a program or file is opened, the OS loads it from secondary storage (hard drive or SSD) into RAM for quick access. (because RAM is faster than secondary storage)
- The CPU fetches instructions and data from RAM for processing.
- Once the task is completed or the program is closed, RAM is cleared to make space for other operations.
Key characteristics of RAM
-Volatile: (Data is lost when the computer is powered off)
-Faster than secondary storage: Provides much faster read/write speeds compared to secondary storage devices e.g(hard drives, SSDs..etc) allowing the CPU to access data quickly.
-Random Access: Any location in RAM can be accessed directly and quickly, rather than sequentially.(CPU can retrieve data at any address in memory without needing to go through previous locations first).
Key characteristics of ROM
-Non-Volatile: Data stored in ROM is permanent and not lost when the computer is powered off.
-Read-Only: Data cannot typically be modified during normal computer operation. This is because once programmed, the state of the memory cells inside doesnt change
-Pre-Programmed: ROM is programmed during manufacturing or through specialized processes like firmware updates.
What is the difference between an input and an output device?
Input = puts data and info into a computer
Output = used to send info from the computer
Give a device that is both an input and an output device
Touch screen
Input = you can touch
Output= displays info
Give examples of optical devices
CD (compact disc)
DVD (digital versatile disc/digital video disc)
BluRay
CDs
Compact discs
-Store small quantities of info
-Thin, small = portable
-Common for audio files, text and digital images
X Easily damaged by scratches
X Limited storage capacity
X Relatively slow transfer speeds
What is role of the control unit? SHORT ANSWER
Directs the operations of the CPU by sending signal to other components, managing flow of data through the processor.
Give functions of the control unit
-Decodes instructions from memory
-Sends signals to other components, such as the ALU and registers, to execute instructions.
-Manages the flow of data within the CPU
-Send memory read/write signals to memory
What is the role of the Arithmetic Logic Unit?
The ALU performs all arithmetic and logical operations within the CPU.
The ALU often includes a small temporary storage register called the accumulator to hold intermediate results of calculations.
What sort of operations does the ALU do?
Logic and arithmetic
-logic= XOR, OR, NOT, AND
-arithmetic= +,-,x…
-Carries out comparison operations (e.g., checking if values are equal or one is greater).
-Stores these results in the accumulator (a temporary storage register)
A type of temporary storage register within the CPU. It is used specifically for storing intermediate results of arithmetic and logic operations performed by the Arithmetic Logic Unit
What is this?
Accumulator
CPU
What is an accumulator?
A type of temporary storage register within the CPU. It is used specifically for storing intermediate results of arithmetic and logic operations performed by the ALU.
How does the accumulator improve processor efficiency?
Its a type of temporary storage register within the CPU which stores intermediate results of logic and arithmetic operations performed by the ALU.
If a program requires multiple calculations in sequence, the accumulator temporarily holds each result so it can be used in the next operation without constantly needing to read from or write back to main memory to get this past result (as that would be time consuming/take more time to retrieve as is less close to processor)
Define register
Registers are small, fast memory locations inside the CPU that temporarily hold data and instructions during processing.
What does the program counter do?
Its a register in the CPU
Holds the memory address of the next instruction to be executed. It increments after each instruction, directing the CPU to the next step.
What does the memory address register do?
Holds the memory address of data that needs to be accessed (either for reading or writing).
What is the role of the Memory Buffer register?
Temporarily holds the actual data fetched from or to be written to memory.
What is the role of the Current instruction register?
Stores the current instruction being decoded and executed.
Give the names of registers in the CPU
-Program counter
-Memory address register
-Memory buffer register
-Current instruction register
-Accumulator
What is the role of the cache?
Cache is a small, high-speed memory that stores frequently accessed data and instructions close to the CPU.
It speeds up access times because before having to look in memory the CPU first looks in the cache.
The cache is divided into levels (L1, L2, and sometimes L3)
(with L1 being the fastest and closest to the CPU cores.
L3 is the largest and typically shared among multiple cores)
The cache is divided into levels (L1, L2, and sometimes L3)
Explain the properties of these levels
L1 being the fastest and closest to the CPU cores (typically integrated directly within them).
L2 shared by all or just one core
L3 is the largest and typically shared among multiple cores.
What is the role of the clock?
The clock generates a continuous stream of electrical pulses which provides the timing signal that synchronizes all operations within the CPU.
one pulse = one cycle.
