Structure and Function of the Processor Flashcards
function of the processor
to execute instructions and manage the rest of the hardware
ALU (arithmetic and logic unit)
completes all the arithmetic , logical and shift operations
CU (control unit)
determines the sequence of operations to be executed from the ALU.
- controls and coordinates activities of the CPU
- manages the flow of data between the CPU and other devices
- accepting the next instruction to be executed in order
- decodes instructions
- stores results back into RAM
Registers
small high speed memory locations used to store temporary data and where all ALU operations occur
PC
holds the address of the next instruction to be executed
ACC
temporarily stores the results from calculation
MAR
stores the address of the memory location currently in use
In the fetch phase, this would be the address of the instruction being loaded; in the execute phase, it would be the address of the data being used.
MDR
A register that contains the data to be stored in the computer storage, or the data after a fetch from the computer storage. It acts like a buffer and holds anything that is copied from the memory ready for the processor to use it.
Busses
Physical pathways shared by signals connecting multiple components in the CPU
Data bus
Address bus
Control bus
Data Bus
bi-directional
The part of the bus which carries data to and from components of the cpu
Address Bus
The part of the bus which carries the address of where the data is being sent to and has been retrieved from.
FROM CPU TO RAM
unidirectional
Control Bus
bi- directional.
carries control signals from the processor to every other component. The control bus also carries the clock’s pulses.
Control Signals
- Bus request: device requesting the use of data bus
- Bus grant: CPU granted access to data bus
- Memory write: data written into the addressed location using this bus
- Memory read: data is read from a specific location to be placed onto the data bus,
- Interrupt request: shows that a device is requesting access to the CPU
- Clock: used to synchronise operations
Pipelining
Process of executing separate instructions simultaneously. {As once and instruction is processed, the next instruction is fetched and one is decoded}
resembles the production line known as (overlapping )and is aimed to improve the efficiency of the processor.
Pipelining Pros
- reduces the times that the CPU is kept idle
- increases the throughput of the system
- makes the system reliable
- cycle processor time is reduces so more instructions are executed per second
Pipelining Cons
- Complex/ costly to manufacture
- instruction latency is more
Instruction pipelining
divides instructions into series of steps {fetch, decode, execute}
Arithmetic pipelining
divides an arithmetic problem into various sub problems and overlapping them as they are performed
Fetch-Decode-Execute Cycle
- Address from PC copied to MAR
- Instruction held at that address is copied to MDR by the data bus
- Simultaneously, contents of the PC are incremented by + 1
- value held in the MDR is copied to the CIR
- The contents of CIR are decoded and executed. results are stored ACC.
Factors affecting the performance of the CPU
Clock speed
Number of cores
Cache
Clock speed
Measured in Hertz, the clock speed is the frequency at which the internal clock generates pulses. The higher the clock rate, the faster the computer will execute instructions per second.
The clock is the electronic unit that synchronizes related components by generating pulses at a constant rate.
Number of cores
CPUs with multiple cores have more power to run multiple programs at the same time. Therefore, if we increase the number of cores in a processor, there will be an increase in system performance.
Cache size
a larger cache size means more programs and instructions can be stored in cache which can be accessed faster than RAM.
Von Neumann Architecture
Traditional computer architecture that forms the basis of most digital computer systems. A single control unit manages program control flow following a linear sequence of fetch-decode-execute
Harvard Architecture
A computer architecture with physically separate storage and signal pathways for instructions and data. These early machines had data storage entirely contained within the central processing unit, and provided no access to the instruction storage as data.
Contemporary Processing
Any modern set of disciplines that describes the functionality, the organization and the implementation of computer systems.
CIR
A register in the control unit that stores the address of the instruction currently being executed and decoded.
