structure and function of the processor pmt flashcards

Question 1

what does the ALU do

Answer 1

completes all arithmetic and logical operations

Question 2

what is the control unit

Answer 2

a part of the processor which directs operations inside the cpu

Question 3

what are registers

Answer 3

small memory cells that operate at
high speeds

Question 4

where do all the ALU , Logic or shift operations occur

Answer 4

in registers

Question 5

what does the program counter do

Answer 5

holds the address of the next instruction

Question 6

in which part of the CPU do all calculations take place

Answer 6

ALU

Question 7

Where are immediate arithmetic and logic results stored

Answer 7

accumulator

Question 8

what does the MAR do

Answer 8

holds the address of a location that is to be read from or written to

Question 9

what does the MDR do

Answer 9

temporarily stores the data that has just been read from or the data needs to be written

Question 10

what does the CIR do

Answer 10

holds the current instruction divided up into opcode and operand

Question 11

what is a bus

Answer 11

a set of parallel wires connecting two or more components together

Question 12

what is the system bus

Answer 12

the collection of the data bus address bus and control bus

Question 13

what is the width of a bus

Answer 13

number of parallel wires it has

Question 14

what is the data bus

Answer 14

a bidirectional bus used to transport data and instructions between components

Question 15

what is the control bus

Answer 15

bi directional bus used to transmit control signals between internal and external components

Question 16

what is the address bus used for

Answer 16

used to transmit the Memory address specifying where the data is to be sent from or retrieved from

Question 17

what does adding a wire to the address bus do to the number of addressable locations

Answer 17

doubles the number of addressable locations

Question 18

what does the bus request indicate

Answer 18

indicates a device is requesting access to the data bus

Question 19

what does the bus grant indicate

Answer 19

indicates that the cpu has granted access to the data bus

Question 20

what does memory write do

Answer 20

causes the data on the data bus to be written into the addressed location

Question 21

what does memory read do

Answer 21

causes the data from the addressed location to be placed onto the data bus

Question 22

what does the interrupt request control signal indicate

Answer 22

indicates that a device is requesting access to the CPU

Question 23

what is the clock control signal used for

Answer 23

used to synchronise instructions

Question 24

what is assembly language

Answer 24

programming language where mnemonics are used to represent instructions

Question 25

what Is opcode

Answer 25

used to determine the type of instruction and what hardware to use to execute it

Question 26

what is the operand

Answer 26

address if where the operation is performed

Question 27

what occurs in the fetch phase

Answer 27

address from PC is copied to MAR
Instruction held at the address is copied to the MDR by the data bus ,simultaneously the contents of the PC is increased by 1
The value of the MDR is copied to the CIR

Question 28

What occurs during the decode phase

Answer 28

contents of CIR is split into operand and opcode

Question 29

what occurs during the execute phase

Answer 29

opcode is executed on the data

Question 30

what is the clock speed

Answer 30

the number of clock cycles completed per second

Question 31

what is cache memory

Answer 31

is the CPUs onboard memory which can be accessed a lot faster than main memory

Question 32

what is pipelining

Answer 32

process of completing the fetch decode and execute of three separate files simultaneously

Question 33

what is von Neumann architecture

Answer 33

there is only one single shared memory and shared data bus for both data and instructions

Question 34

what is Harvard architecture

Answer 34

two separate memory and data buses for data and instruction

Question 35

what is contemporary processing

Answer 35

processing in which von Neumann is used for main memory
cache uses Harvard , divided into instruction cache and data cache