structure and function of the processor pmt flashcards
made by pmt
what does the ALU do
completes all arithmetic and logical operations
what is the control unit
a part of the processor which directs operations inside the cpu
what are registers
small memory cells that operate at
high speeds
where do all the ALU , Logic or shift operations occur
in registers
what does the program counter do
holds the address of the next instruction
in which part of the CPU do all calculations take place
ALU
Where are immediate arithmetic and logic results stored
accumulator
what does the MAR do
holds the address of a location that is to be read from or written to
what does the MDR do
temporarily stores the data that has just been read from or the data needs to be written
what does the CIR do
holds the current instruction divided up into opcode and operand
what is a bus
a set of parallel wires connecting two or more components together
what is the system bus
the collection of the data bus address bus and control bus
what is the width of a bus
number of parallel wires it has
what is the data bus
a bidirectional bus used to transport data and instructions between components
what is the control bus
bi directional bus used to transmit control signals between internal and external components
what is the address bus used for
used to transmit the Memory address specifying where the data is to be sent from or retrieved from
what does adding a wire to the address bus do to the number of addressable locations
doubles the number of addressable locations
what does the bus request indicate
indicates a device is requesting access to the data bus
what does the bus grant indicate
indicates that the cpu has granted access to the data bus
what does memory write do
causes the data on the data bus to be written into the addressed location
what does memory read do
causes the data from the addressed location to be placed onto the data bus
what does the interrupt request control signal indicate
indicates that a device is requesting access to the CPU
what is the clock control signal used for
used to synchronise instructions
what is assembly language
programming language where mnemonics are used to represent instructions
what Is opcode
used to determine the type of instruction and what hardware to use to execute it
what is the operand
address if where the operation is performed
what occurs in the fetch phase
address from PC is copied to MAR
Instruction held at the address is copied to the MDR by the data bus ,simultaneously the contents of the PC is increased by 1
The value of the MDR is copied to the CIR
What occurs during the decode phase
contents of CIR is split into operand and opcode
what occurs during the execute phase
opcode is executed on the data
what is the clock speed
the number of clock cycles completed per second
what is cache memory
is the CPUs onboard memory which can be accessed a lot faster than main memory
what is pipelining
process of completing the fetch decode and execute of three separate files simultaneously
what is von Neumann architecture
there is only one single shared memory and shared data bus for both data and instructions
what is Harvard architecture
two separate memory and data buses for data and instruction
what is contemporary processing
processing in which von Neumann is used for main memory
cache uses Harvard , divided into instruction cache and data cache
