Structure And Function Of Processor Flashcards

1
Q

What is the CPU and what does it do

A

. Central processing unit
. Made up of switches
. Processes data, search, sorts, calculations
. Components: ALU, Registers, buses, control unit

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2
Q

RAM

A

. Random access memory
. Volatile
. Where all data files and programs are stored when being used- they are copied from secondary storage and deleted when closed
. Fasted than secondary but slower than cache
. Holds data being used currently
. Expensive
. Can have more programs open

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3
Q

Clock speed

A

. Processor runs to the timings of a clock signal. This is measured in hertz
. Overclocking is manipulating the clock speed to increase it but it can cause the computer to overheat
. Higher clock speed, more instructions can run per second

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4
Q

Cache

A

. Super fast primary storage
. Sits on the CPU and can’t hold much because it is so expensive
. Stores frequently or recently used instructions

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5
Q

Control unit

A

. Manages the execution of machine code by sending out the control signals to control how the cpu works
. Directs flow of data
. Synchronises instructions with clock speed

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6
Q

Control bus

A

. Bi directional
. Carries control signals around cpu
. Signals are generated by control unit

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7
Q

Data bus

A

. Bi directional
. Carries data and instructions between cpu and RAM

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8
Q

Address bus

A

. One directional
. Carries memory addresses from the processor to the RAM
. Can be the address of data that is being read or written
. Address is either used during fetch or execute part of the cycle

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9
Q

ALU

A

. Perform arithmetic and logical operations of data
. Shift operations, boolean logic, addition, subtract
. Contains the accumulator register where results of the calculations are stored

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10
Q

Registers

A

. Memory that operates at a very high speed, the same speed as the processor
. 4 or 8 bytes
. Volatile
. General purpose registers perform calculations
. Special purpose registers are essential for the cpu to work

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11
Q

Program counter

A

. Contains address of the next instruction executed
. Helps processor keep track of where it is in the program
. When address moves to MAR, PC is incremented to point to the address of the next instruction in the sequence
. Value incremented is calculated from size of instructions in the given instruction set

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12
Q

MAR

A

. Holds the address of the memory location from which an instruction or data is to be fetched or written
. If an instruction is being fetched then the pc and the MAR will hold the same value
. Can hold different address to pc

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13
Q

MDR

A

. Stores the data that is to be fetched from or written to RAM

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14
Q

CIR

A

. CIR stores instruction that is being executed
Operand- specifies the data that needs to be acted on
. Opcode- tells the processor the job that needs to be done

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15
Q

ACC

A

. Used to temporarily store data whilst calculations are being performed within the ALU

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16
Q

Fetch

A

. Pc holds address of next instruction
. Address stored is copied to MAR
. Sent along address bus to main memory where it waits to receive signal from control bus
. CU sends a read signal to main memory
. Contents stored can now be sent along data bus to MDR
. Data received by the MDR gets copied into CIR
. PC is incremented so it points to next instruction to be executed

17
Q

Decode

A

. Opcode is what we need to do
. Operand is where data is or the data itself
. Control unit will decode the instruction in the CIR

18
Q

Execute

A

. Send address down address bus to main memory
. CU sends read signal to main memory
. Co tents stored can now be sent to MDR
. Contents of MDR are now copied to the ACC

19
Q

Assembly language

A

. Low level language
. Each instruction represents a machine code instruction so that means much longer programs than high level language
. Uses mnemonics
. To translate into machine code, use an assembler

20
Q

Number of cores

A

. Dual core processor increases the number of cores making it faster because more FDE cycles can run at once
. A processor will often have multiple linked processors on the same circuit

21
Q

Multi tasking

A

. Where each core can process two different instructions at once

22
Q

Word size

A

. A natural unit of data used by a particular processor design
. A word is a fixed sized piece of data handled as a unit by the instruction set or hardware of the processor
. Each word in memory has its own specific address

23
Q

Pipelining

A

. Allowed us to do multiple parts of FDE cycle at once. As one instruction is executed, the next can be decoded, the next can be fetched, and this reduces processing time

24
Q

Pipelining: branching

A

. Pipelining only works if cpu knows what instructions needs to be fetched next
. If it fails to correctly forecast the instruction, entire pipeline needs to be flushed

25
Q

Pipeling: data hazards

A

. 2 instructions in a pipe could reference the same data
. If a later instruction changes data before on earlier instruction, this causes a data hazard.
. Pipelining process must stop the later instruction from accessing the data before the earlier instruction

26
Q

Pipelining: timings

A

. Each instruction takes different times
. One solution is fixed approach
. Each stage is assumed to take a fixed number of clock cycles
. Next stage is the cycle is started when the number of clock cycles has passed
. This is simpler but less effective than asynchronous method
. Each pipeline has a flag
. When all flags for particular stage are set, that indicates next stage can begin

27
Q

Pipelining: interupts

A

. An interupt process can begin at the very end of a FDE cycle.
. Processor jumps to the interupt handling routine, processes the interupt, reloads the registers with the saved ones and then continues processing the program