Storage Sub-System Flashcards
What is the formula for Average Memory Access Time (AMAT)
AMAT = Hit time + (Miss rate × Miss penalty)
What are the three components of cache performance
- Hit time
- Miss rate
- Miss penalty
Define hit time in cache performance
The time taken to access data from the cache successfully
What is a miss penalty
the additional time required to fetch data from a lower-level cache or main memory after a cache miss
Define cache miss
a state where data requested by a component (such as a processor) is not found in the cache
What are the three main categories of cache performance optimisation
- reducing miss rate
- reducing miss penalty
- reducing hit time
How can we reduce the miss rate in a cache
increase block size, increase cache size and use higher associativity
what is associativity
How can we reduce the miss penalty
use multilevel caches and prioritise read operations over writes
why prioritise multilevel caches
✅ Multilevel caches improve speed by catching data closer to the CPU.
✅ They reduce memory access time by lowering miss penalties.
✅ They balance speed vs. size, keeping small caches fast and large caches efficient.
✅ They save power, reducing RAM access.
✅ They enhance multi-core performance, enabling efficient data sharing.
How can hit time be reduced
optimise cache structure and use faster technologies
how can we optimise cache structure
What are the three types of cache misses
- compulsory miss
- capacity miss
- conflict miss
What is a compulsory miss
a miss that occurs when data is accessed for the first time and must be loaded into the cache (it currently isn’t there)
What is a capacity miss
A miss that happens when the cache is too small to store all required data, causing frequent discarded data
what is a conflict miss
A miss due to limited associativity, where multiple blocks compete for the same cache location even though there is space else where in the cache
Explain the differences between a capacity and conflict miss
explain conflict miss
How does adding a second level cache improve performance
It reduces the miss penalty by catching accesses that would otherwise go to main memory
What is the formula for AMAT in a two level cache system
AMAT = Hit timeL1 + Miss rateL1 × (Hit timeL2 + Miss rateL2 × Miss penaltyL2)
What is the difference between local and a global miss rates
Local miss rate: Misses in a cache divided by total accesses to that cache.
Global miss rate: Misses in a cache divided by total accesses from the processor.
How does higher associativity affect cache performance
It reduces conflict misses but may increase hit time.
What happens off the block size is too large relative to the case size
Miss rate may increase due to more conflict and capacity misses.
What is the trade off when increasing block size
It reduces compulsory misses but may increase miss penalty and conflict misses.
What is associatively in case memory
Associativity determines how memory blocks are mapped from main memory into cache.
What are the three types of cache associatively
Direct-mapped, fully associative, and set-associative.
What is a direct-mapped cache?
Each memory block maps to exactly one cache location.
What is the main advantage of a direct mapped cache
Simple and fast memory lookup
what is the main drawback of a direct-mapped cache
High conflict misses if multiple blocks map to the same cache slot.
What is a fully associative cache?
Any memory block can be placed anywhere in the cache.
What is the advantage of a fully associative cache?
It eliminates conflict misses.
What is the drawback of a fully associative cache?
Slow lookup time due to complex searching mechanisms.
What is a set-associative cache?
A cache where each memory block maps to one specific set but can be placed in any of the available ways within that set.
How does a 4-way set-associative cache work?
The cache is divided into sets, and each set has 4 slots (ways). A memory block can be placed in any of the 4 ways within its set.
What are the pros and cons of a direct-mapped cache?
✅ Fast lookup, ❌ High conflict misses.
What are the pros and cons of a fully associative cache?
✅ No conflict misses, ❌ Slow lookup and expensive hardware.
What are the pros and cons of a set-associative cache?
✅ Balance of speed and flexibility, ❌ More complex than direct-mapped.
Define sets
A set in cache memory is a group of cache lines (blocks) where a memory block can be placed in a set-associative cache.
Explain why conflict misses occur for direct mapped cache
1️⃣ Suppose we have a direct-mapped cache with 4 slots (sets).
2️⃣ A block’s cache location is determined using (Memory Address) MOD (Number of Sets).
3️⃣ Blocks 4, 8, 12, 16… all map to the same set (Set 0).
4️⃣ Even if Sets 1, 2, and 3 have empty space, these blocks must go into Set 0.
5️⃣ Every time a new block that maps to Set 0 is accessed, it overwrites the previous one, causing a conflict miss.
What would L1 cache be used for in multilevel cache
Frequently used instructions and data
it could store cpu registers, program counters, instruction decoders
What would L2 cache be used for in multilevel cache
✅ Recently used data and instructions that didn’t fit in L1
✅ Pre-fetched data the CPU might need soon
✅ Often exclusive (doesn’t duplicate L1 content)
What would L3 cache be used for in multilevel cache
✅ Data and instructions used across multiple CPU cores
✅ Cache-line sharing data for multi-core processing
✅ Pre-fetched data from RAM to reduce memory bottlenecks
