Storage and I/O Flashcards
The CPU is attached to main memory via the _______ ____
memory bus
Devices are connected to the system via the ___ ____
I/O bus
What are buses?
Data paths provided to enable information between CPU(s), RAM, and I/O devices
The I/O bus connects a ____ to an ____ device
CPU, I/O
What 3 hardware components connect the I/O bus to I/O device?
- I/O ports
- Interfaces
- Device controllers
Software interacts with device though device _______
interfaces
Device interfaces are just _________ and _______ device registers
programming, reading
What 3 values does an interface register have?
- Status
- Command
- Data
The status value in an interface register shows the current _______ of the device
status
The command value in an interface register tells the device to perform a _____
task
The data value in an interface register ______ or ____ data from the device
passes, gets
Devices are addressed by direct I/O __________ or _____-______ I/O
instructions, memory-mapped
In memory-mapped I/O, a device’s data and command registers are mapped to the _______ ______ _____
processor address space
What is the interrupt-driven I/O cycle?
- CPU device driver initiates I/O
- I/O controller initiates I/O
- I/O controller generates interrupt signal with input, output, or error
- CPU receives interrupt and transfers control to interrupt handler
- Interrupt handler processes data and returns
- CPU resumes interrupted task
Direct memory access transfers data _____ between I/O device and memory
directly
___________ I/O suspends processes until the I/O is complete
blocking
Blocking I/O is easy to ___ and ________
use, understand
Blocking I/O us ________ and _______ for some needs
inefficient, insufficient
__________ I/O return I/O calls as much as possible
nonblocking
Nonblocking I/O is implemented via __________
multi-threading
_____________ I/O allows processes to run while the I.O executes
asynchronous
Asynchronous I/O is _________ to use
difficult