Semester 2 Final Flashcards
Different way to represent diodes, what rule do diodes not follow?
What’s a typical voltage for a silicon diode?
Diodes have a voltage drop Vd at a typical current Id
Voltage drop can be represented by a voltage source pointing the other way.
This source DOESN’t deliver any power-it consumes power.
Doesn’t follow Ohms law
0.7V
Non-inverting Op Amp-what’s it look like, how to work Vout
Vout goes into V- through one resistor, with a second resistor in series going to ground.
Vout = Vin * (R1 + R2)/R2
How to check for negative feedback in an amplifier?
What about if you get positive feedback?
- Disconnect the circuit that feeds back from the output
- Increase Vin (=V+) from 0V to a small positive voltage
- Reconnect the feedback circuit
- If Vout is reduced for the same Vin value, negative feedback
If you get positive feedback, its not a fucking amplifier
Inverting Op Amp-what’s it look like, how to find Vout
V+ goes to ground.
Vout = -(R2/R1)*Vin
R1 is first resistor from Vin, R2 is second
What’s virtual ground and how does it work?
In an ideal Op Amp V+=V-
In an inverting Op Amp V+ is 0 as its connected to ground. This means that despite V- being connected to the power supply, its also 0
Inverting Schmitt Trigger: what’s it look like, equations for trigger voltages, what’s the loop look like
Looks like a non-inverting Op Amp but with the potential dividor from Vout going into V+ (swap V+ and V- around)
Vtrigger = +/-Vsupply * R2/(R1 + R2)
Loop starts at top left, falls to bottom right
Non-inverting Schmitt trigger: what’s it look like, equations for trigger voltages, what’s the loop look like
Looks like an inverting Op amp except V- goes to ground and V+ goes halfway between R1 and R2
Vtrigger = +/-Vsupply* R1/R2
Loops starts at bottom left, rises to top right
What is a Schmitt trigger
Circuit where the output increases to a set maximum when the input rises above a certain threshold, and decreases to 0 when the input falls below another threshold
Gives positive feedback instead of negative
4 types of filters and how they react to different frequencies
Low-pass filter: only lets low frequency signals through
High-pass filter: only lets high frequency signals through
Band-pass filter-only lets signals in a certain range of frequencies through
Band-stop/notch filter: stops frequencies in a certain range from going through
JFET: what it stands for, how exactly the inputs affect each other
Junction Field Effect Transistor Two inputs: drain and gate One output: source Id = Id (roughly) Ig = 0 (roughly) Vgs (voltage between gate and source) controls drain current
What is the equivalent circuit model for a FET?
A voltage controlled current source with a resistor r0 across it
What is a depletion-mode MOSFET?
What is an enhancement-mode MOSFET?
Vgs = 0, current flows
Vgs «_space;0, current stops flowing
Vgs = 0, no current flows
Vgs > 0, current flows
Given an equivalent circuit model for a FET, what equation would you use to work out Id involving a constant K
Id = k*((Vgs - Vth)^2)/2 Vgs = gate-source voltage Vth = threshold voltage: the Vgs required for drain current to start to flow
Equation for IV load line for an FET equivalent circuit
Equation to calculate gradient of the line
Vds = Vdd - Rd*Id Vds = drain-source voltage Vdd = power rail, voltage going into drain Rd = resistor between power rail and circuit Id = drain current
Rearrange for Id to be y in y=mx+c
Gradient = -1/Rd
What is the Q point of a MOSFET IV graph?
What are the coordinates?
The intercept of load line and the MOSFET curve of gate-source voltage against drain current
Id, Vds
What is gm
The equation linking drain current to gate-source voltage using gm
How to calculate it graphically when an AC voltage is applied to the MOSFET?
gm = transconductance
Id = gm*Vgs
Its equal to the gradient of the slope of the Id-Vgs graph between the peak-to-peak voltages of the input
Calculating gm using current, gate-source voltage and threshold voltage
Calculating Vout using gm, drain resistor and input voltage
gm = (2*Id)/(Vgs - Vth)
Vout = -gm*Rd*Vin Rd = drain resistor
Average gain equation
Input resistance
Av = Vout/Vin = -gm*Rd
Rin = Vin/Iin = R1 || R2 Iin = current in
What is clipping?
How do you determine maximum amplitude of a wave before clipping from a Vgs graph?
If the gate-source voltage is too high, the trange of voltages will not be in the linear region of the MOSFET (remember expontential graph). This will cause the MOSFET to switch off periodically, making the top of the wave flatten
Half of the voltage region it works in
What is the purpose of Rf?
What always accompanies RF and why?
It stabilises the Q-point against variation in FET parameters
A capacitor is in parallel with Rf. Allows equations for AC analysis to be used as the capacitor shorts during AC analysis
Equation for the load line of a DC FET amplifier with Rf-similar to equation without Rf
-(Rd + Rf)^-1
How do these equations change when we have no capacitor in parallel with Rf: Input voltage (Vin) Average gain equation (Av)
Vin = IdRf + Vgs
Normally Vin = Vgs
Av = Rd/(Rf + 1/gm)
Normally Av = Vout/Vin = -gm*Rd
How do these equations change when we have no capacitor in parallel with Rf: Output voltage (Vout) Drain current (Id)
Vout = (VinRd) / (Rf + 1/gm)
Normally Vout = -gmRd*Vin
Id = Vin / (Rf + 1/gm)
Normally id = gm*vgs
How to use an FET as a switch
What kind of logic gate is it?
Take out R1.
When you connect input to power rail, it allows the power rail to go through the transistor straight to ground.
A = 8V, Q = 0V
When you connect input to ground rail, Vgs = 0V which means current will not flow through the transistor. This means it all exits via Q
A = 0V, Q = 8V
NOT gate
How are AND and OR gates made from switchs in a circuit?
AND: Two switchs in a row
OR: Two switchs in parallel
Making NOR gate out of two FET switchs?
What’s a NOR gate?
Two switchs attached in series to the same output line. Output is connected to one power rail. If either switch is closed the output goes to ground and becomes 0.
Only outputs 1 if both inputs are 0
Making NAND gate out of two FET switchs?
Two FET switchs attached in parallel-the source of the top one is attached to the drain of the bottom one. The only way to get 0 output is to close both switchs
Only outputs 0 if both inputs are 1
Making NOT gate out of two FET switchs
Two FET switchs in series. Q output from first goes into the gate on second
Voltage gain in db
Current gain in db
Power gain in db
All logs are log10
Vdb = 20 * log(V/V0)
Idb = 20 * log(I/I0)
V/V0 / I/I0 = gain
Pdb = 10 * log(P/P0)
How to work out roughly the E12 series?
Start at 1.0 and times by 10^(1/12)
Stops being accurate after 2.2
