Section 7 (if something is wrong please change/if there are good questions i have not asked add them in) Flashcards
What is the Processor (also known as CPU)
A device that carries out computation on data and instructions, in order to produce an output.
Define Main memory
Stores data and instructions that will be used by the processor.
Fetch execute cycle
The continuous process of data movement between main memory and the processor during the running of a program.
Random access memory
Stores data and can be read to and written from, it is a temporary storage, which is quickly accessible.
Read only memory
Stores data and can be read from but not written to(unless it is programmable ROM) and is not volatile.
Data Bus
Transfers data between memory and processor(bi-directional).
Address Bus
Used to specify a physical address in memory so that the data bus can access it.
Control Bus
Controls the flow of data between the processor and other parts of the computer.(bi-directional).
Bus width
The number of wires in a bus.
Word length
The number of bits that can be addressed, manipulated or transferred as one unit.
Input and output controller
The processor cannot directly communicate with I/O devices therefore an interface called the I/O controller handles the flow of data between the two.
Controller also behaves as a buffer as data from I/O devices are processed slower.
Von Neumann architectures
A technique of building a processor that stores data and instructions in the same main memory and uses the same busses.
Harvard architectures
A technique of building a processor that stores data and instruction in seperate memory and uses different busses
What benefits are there to the two architectures.
pass
State the Stored Program Concept
The idea that data and instructions are stored in memory together and is fetched , decoded and executed by the processor.
List the components of the processor that allows for the fetch execute cycle to occur
The Control Unit
The Clock
The Arithmetic Logic Unit
Registers
Define Control Unit
Part of the processor that manages the execution of instructions and makes sure data is being transmitted to the correct destination.
Define ALU
Part of the processor that processes and manipulates data.
Also carries out arithmetic and logic calculations when the control unit sends it an opcode and operand to process.
Define Clock
A device that generates a signal that synchronises the components pf a computer, processor and the movement of data(MHz..millions of cycles a second)
Define Register
A small piece of temporary storage that is part of the processor and stores data and instructions during the fetch execute cycle
Name the 5 registers involved in the fetch execute cycle
Program Counter Memory Address Register Memory Buffer Register Current Instruction Register Status Register
Program Counter
A register that stores the address of the first or next instruction to be taken from main memory by the processor
MAR
A register that stores the location of address that data is either being COPIED FROM or WRITTEN TOO by the processor
MBR
A register that stores the data and instruction that is either being COPIED FROM or WRITTEN TOO by the processor
CIR
A register that stores the instruction that the processor is currently decoding or executing
SR
Keeps track of the computers various functions and the properties of data
Define the Fetch Execute Cycle
The continuous cycle of retrieval of machine code and movement of data from main memory to processor while a program is being ran.
Fetch
- PC set to address of first/next instruction
- Address in PC sent to the MAR
- Address of memory is transferred along the address bus into main memory
- Content of main memory is transferred through the Data Bus and stored in the MBR
- The data or instruction is stored in the CIR
- PC increments
Decode
-Instruction/Data held in CIR is transferred into the Control Unit(which will execute the instruction)
Execute
- If necessary data is fetched
- The opcode and Operands are sent to the ALU
- Result stored in the accumulator
Factors affecting the performance of the processor
- Multiple Cores: The n amount of cores allows for n amount of instructions to be executed in one clock pulse
- Clock Speed: How fast each instruction will be executed
- Bus Width: The more wires there are in a bus more bits will be transferred in one pulse
- Cache Memory: High speed temporary memory that stores frequented data and instructions
The Processors Instruction Set
A pattern of machine code that a specific processor recognises as commands
What are the two types of instruction sets
Complex instruction set (CISC) and Reduced instruction set(RISC)
Define Addressing mode
The way in which the operand is interpreted
Direct Address
The operand is the memory address or register number
Immediate Address
The operand is the datum
Opcode
An operation code used in assembly language
Operand
A value or memory address that forms part of an assembly language’s instruction
what are the two types of addressing modes?
Immediate address
Direct address
Translate:
IF x < 5
THEN B = 10
ELSE B = 11
END IFCMP #5 < R1
BLT foo
B goo
foo
mov R2, #10
halt
goo
mov R2, #11
Define Interrupt
A signal sent by a device or program to the processor requesting its attention.
Additional Information: Interrupts are stored in the interrupt register and each time the CPU completes one cycle it will check the interrupt register for any instructions it should do immediately before continuing with the fetch execute cycle.
Examples of when an Interrupt signal is sent to the processor?
- Printer requesting for more data to be sent
- User pressing key on keyboard or clicks on the mouse
- User sending a signal asking the computer to terminate a program
Define Interrupt Service Routine (IRS)
Calls the routine required to handle an interrupt
Additional Information: This routine consists of placing whatever its current task is on the fetch execute cycle and placing it on the system stack. Once the Interrupt has been processed it will retrieve the values on the stack and put them back in the appropriate registers.
Define Priorities
A method for assigning importance to interrupts in order to process them in the right order.
Additional Information: interrupts on order of highest priority
- Hardware Failure
- Reset Interrupt
- Program error
Vectored Interrupt mechanisms
A method of handling interrupts by pointing to the first memory address of the instruction needed.
Additional Information:
