Scoreboard Theory Flashcards
What are the basic assumptions taken for the school board dynamic scheduling algorithm
Single issue processor
Instruction fetch and instruction issue in order
Multiple pipelined functional units
Execution and memory stages might require multiple cycles
Out of order execution and commit
What is the main idea behind the scoreboard dynamic scheduling algorithm?
To allow data independent instructions behind stall to proceed
Describe the ID stage in the scoreboard dynamic scheduling algorithm
The scoreboard divides the ID stage in two stages
First the issue – decode stage where the instructions are issued, and decoded and structural hazards are checked
Second, we have the read operands in which we wait until the data is available, and there are no data hazards
Are there possibilities for WAR and WAW hazards to occur? Why? What are the solutions for each of them?
Yes, due to the out of order commit and execution
The Solutions for the WAR are to read registers only during the read operabds stage and to stall write back until previous registers have been read
The solutions for the WAW, otherwise, is to detect WAW and stall issue of a new instruction until previous instruction causing WAW completes
How are hazards detections and resolutions done in the scoreboard dynamic scheduling algorithm?
Any hazard detection and resolution is centralized. Every instruction goes through the scoreboard, where a record of dated dependencies is constructed.
If the scoreboard decides the instruction cannot execute immediately, it monitors every change and decides when the instruction can execute
The scoreboard also decides when the instruction can write its results into destination register (check for WAR and WAW)
Open the 1 photo of a scoreboard architecture processor, in the ACA album, and describe the measure taken in order to avoid hazards in each stage of the pipeline
What are the stages in the scoreboard dynamic scheduling algorithm?
First, the issue, where we check for structural guards and also for WW Ozard on destination
Second, read operand, where we check for our RAW hazards and also for structural hazards in reading the register file
Then we execute the instructions and finally, we write results checking for WAR hazards in the destination operand and also for structure hazards in writing in the register file
This describe the issue stage in the scoreboard dynamic scheduling algorithm
It is when the instructions are decoded and checks for structural hazards and WAW hazards happen
Instructions are issued in program order, if a functional unity for the instruction is available (no structural hazard) and no other active instruction has the same destination register (no WAW Hazard) the scoreboard issues the instructions to the functional unit and updates its data structure
If either a structural Hazard or a WAW, Hazard exists instruction issue stalls and no further instructions are issued until these Hazard are solved
Describe the read operands stage in the scoreboard dynamic scheduling algorithm
In this stage, we wait until there are no RAW hazard to read the operands and also check for structural hazards in reading the register file
The source operand is considered available if no earlier issued active instruction will write on it or a functional unit is writing its value in a register
When the source operands are available, the scoreboard tells the FU to proceeded to read the operands from the RF and begin execution
RAW are solved dynamically in this step, no data forwarding
Define the execution stage in the scoreboard dynamic scheduling algorithm
The FU begins execution upon receiving operations. When the result is ready, it notifies the scoreboard that execution has been completed.
Describe the write result stage in the scoreboard dynamic scheduling algorithm
In these stage, we check for W Hazard destination, and for structural hazards in writing RF and finish execution
Once the scoreboard is aware that the FU has completed execution, the scoreboard checks for WAR Hazard, if none it writes the results, otherwise the scoreboards stalls the completing instruction
DIVD F0,F2,F4
ADDD F6,F0,F8
SUBD F8,F8,F14
MULD F6,F10,F8
What would the scoreboard algorithm do?
The Scoreboard would:
• Stall SUBD in the WB stage, waiting for ADDD reads F0 and F8 and
• Stall MULD in the ISSUE stage until ADDD writes F6.
renaming at compile time.
Take a look at the picture 2 in the ACA album and describe the steps followed by the Scoreboard Algorithm
