Programming in RISC-V Assembly Language

Question 1

Whats the diffrence between “Von-newman” and “Harvard architechture”.

Answer 1

Harvard has seperate program and data memories.

Question 2

What does “RISC” stand for?

Answer 2

“A Reduced Instruction Set Computer (RISC) is designed to perform a small
set of simple machine instructions at high speed.”

Question 3

RISC vs CISC

Answer 3

RISC ISAs tend to be more compiler friendly and require less CPU hardware to
implement than CISC instructions, but result in somewhat longer programs.

Question 4

What does “CISC” stand for?

Answer 4

“A Complex Instruction Set Computer (CISC) is designed to perform a large
set of compound machine instructions, each consisting of several operations.”

Question 5

What is “assembly program language”?

Answer 5

To make it easier for humans to compose CPU-level programs, each CPU instruction is given a
unique human-readable equivalent called assembly mnemonic
*All possible assembly mnemonics together comprise the assembly language.

Question 6

What is an “assembler”?

Answer 6

Assembler is a program that converts assembly mnemonics into equivalent machine instructions

Question 7

What is “MMIO”?

Answer 7

The concept of computer memory was originally designed as a way of storing data
The same mechanism is also used as a way of interacting with “peripheral” devices
(keyboards, displays, network cards, etc.)

Question 8

What is “memory mapped registers”

Answer 8

Certain memory addresses reserved for such interactions are called “memory
mapped registers”

Question 9

What “memory address space”?

Answer 9

The range of all possible memory addresses accessible to the program is called
memory address space. For example, a processor with 32-bit wide memory
address bus has memory address space of 232 = 4294967296 distinct memory
locations from 0x00000000 to 0xFFFFFFFF

Question 10

what is a “trap handler”?

Answer 10

(a.k.a. Interrupt service routine or ISR) is a subroutine-like sequences of CPU
instructions, whose starting address in memory is stored in a special CPU register. A trap handler is
designed to analyse the cause of the interruption and perform actions required to handle it. In many
cases the CPU returns to the execution of the interrupted program once the necessary handling is
performed. More on this is to follow in the next chapter of this course.