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AS Level CS 9618 Paper 1 > processor fundamentals > Flashcards

processor fundamentals Flashcards

1
Q

von neumann architecture

A

consists of a single shared, memory for programs and data

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2
Q

control unit

A
  • directs and co-ordinates other parts of computer system
  • controls operations for computer system
  • fetches computer instructions
  • decodes each instruction
  • executes the instruction
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3
Q

arithmetic logic unit

A
  • a unit which performs arithmetic operations
  • and bit shifting operations
  • logic operations (AND, OR, XOR)
  • designed to perform integer calculation
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4
Q

operand

A

part of the computer instruction which specifies what data is to be processed

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5
Q

opcode

A

the instruction executed by the CPU

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6
Q

register

A
  • small piece of memory
  • part of the processor
  • temporary storage of data which is about to be or has been processed
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7
Q

general purpose register

A

holds the temporary data while performing different operations

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8
Q

special register

A

holds the status of the program

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9
Q

program counter

A

stores the address of the next instruction to be fetched

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10
Q

memory address register (MAR)

A

stores the memory address where data is to be read from

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11
Q

memory data register (MDR)

A

stores data that has just been read from memory

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12
Q

current instruction register (CIR)

A

stores the instruction that is currently being executed

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13
Q

index register (IX)

A

used for indirect addressing

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14
Q

accumulator

A

a register that temporarily stores arithmetic and logic data

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15
Q

status register

A

interpreted as independent flags, each flag is set depending on an event

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16
Q

system clock

A
  • internal clock that regulates the rate at which instructions are executed
  • used to synchronize all operations
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17
Q

data bus

A
  • carries data between processor and memory
  • bi-directional
  • used to exchange data
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18
Q

address bus

A
  • uni-directional
  • carries signal related to memory address
  • between processor and memory
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19
Q

control bus

A
  • transmits signals between control unit and other components
  • bi-directional
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20
Q

factor affecting computer performance: data bus width

A
  • determines number of bits that can be simultaneously transferred
  • increasing width increases number of bits that can be transferred
  • increasing improves processing speed as fewer transfers are needed
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21
Q

factor affecting computer performance: clock speed

A
  • one F-E cycle is run on each pulse
  • clock speed dictates the no. of instructions that can be run per second
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22
Q

factor affecting computer performance: cache memory

A
  • can improve processor performance, similar to RAM, cache uses SRAM
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23
Q

factor affecting computer performance: number of cores

A
  • each core processes one instruction per clock pulse
  • more cores mean that sequence of instructions can be split between them and more than one instruction is executed per clock pulse
  • more cores decreases the time taken to complete task
24
Q

Port

A

acts as an interface between computers and other peripheral devices

25
Q

USB port

A
  • stands for universal serial bus
  • asynchronous serial data transmission method
  • serial refers to a single wire being used to transmit data one after the other
  • asynchronous refers to a sender using its own clock rather than sharing the same one w/ recipient device.
26
Q

USB system pros

A
  • fast data transfer
  • once plugged, devices are auto detected and drivers are loaded up automatically
  • connectors only fit one way to prevent incorrect connections from being made
  • is the industrial standard
  • several different data transmission rates are supported
27
Q

high definition multimedia interface (HDMI)

A
  • helps to connect more monitors
  • ports allow to output both audio and visual
  • support high definition signals
  • faster data transfer
  • increases bandwidth making it possible to supply the the necessary data for high quality sound and visual effects
28
Q

pros of HDMI

A
  • current standard for modern televisions and monitors
  • allows for a very fast data transfer rate
  • improved security, helps prevent piracy by the by the help of HDCP
  • supports modern digital system
29
Q

cons of HDMI

A
  • not a very robust connection
  • limited cable length
30
Q

pros of video graphics array (VGA)

A
  • simpler tech
  • only one standard available
  • easy to split the signals and connect a number of devices from one source
  • connection is very secure
  • supports a higher refresh rate
31
Q

cons of video graphics array (VGA)

A
  • it does not support audio
  • outdated as modern laptops rarely have a VGA port
  • easy to bend the pins when making connections
32
Q

fetch execute cycle

A
  • PC holds address of the next instruction to be fetched
  • address in PC is copied to MAR
  • PC is incremented
  • instruction is copied from address stored in MAR to MDR
  • then instruction from the MDR is copied to CIR
33
Q

what is an interrupt

A
  • a signal from source/device
  • telling the processor that its attention is needed
34
Q

hardware interrupt example

A
  • printer out of paper
  • no CD in drive
35
Q

software interrupt example

A
  • run-time error
  • a running program needs input
36
Q

how processor handles interrupt

A
  • an interrupt will cause one of the bits in the interrupt register to change its status
  • at the next F-E cycle, the interrupt register is checked bit by bit
    the contents would indicate an interrupt occurred during the previous cycle + needs servicing
  • the CPU would now service this interrupt or ignore it for now depending on its priority
  • once interrupt is serviced by CPU, it stops its current task and stores the contents of its registers
  • once fully serviced, the register is reset and the contents of registers are restored
37
Q

assembly language

A
  • low level language
  • type of language which can be used to communicate with the computer hardware directly
38
Q

machine code

A

code written in binary that uses the processor’s basic machine operations

39
Q

Relationship between machine and assembly language

A

every assembly language instruction (source code) translates into exactly one machine code instruction (object code)

40
Q

symbolic addressing

A
  • symbols used to represent operation codes
  • labels can be used for addresses
41
Q

absolute addressing

A

the contents of the memory location in the operand
are used

42
Q

assembler

A
  • software that changes assembly language into machine code for the processor to understand
  • replaces all mnemonics and labels with their respective binary values
43
Q

one pass assembler

A
  • converts mnemonic source code into machine code in one sweep
  • cannot handle code that involves forward referencing
44
Q

two pass assembler: 2 passes thru the code

A
  • on the first pass: symbol table created to enter symbolic addresses and labels into specific addresses. all errors are suppressed
  • on the second pass: jump instructions access memory addresses via table. whole source code translates into machine code
  • errors reported if they exist
44
Q

direct addressing

A

loads contents at address into ACC

44
Q

indirect addressing

A

address to be used is at given address, load contents of this second address to ACC

44
Q

indexed addressing

A

form the address to be used as ACC + contents of IR

45
Q

relative addressing

A

next instruction to be carried out is an offset number of locations away, relative to address of current instruction held in PC, allows for relocatable code

46
Q

conditional jump

A

has a condition that will be checked

47
Q

unconditional jump

A

no condition to be followed, simply jump to the next instruction

47
Q

arithmetic shift

A

used to carry out multiplication and division of signed integers represented by bits in the accumulator by ensuring that the sign-bit is the same after the shift

48
Q

logical shift

A

zeros replace the vacated bit position

49
Q

cyclic shift

A
  • the bit that is removed from one end by the shift is added to the other end
50
Q

bit masking

A

an operation that defines which bits you want to keep and which bits you want to clear

51
Q

masking to 1

A

OR is used with a 1

52
Q

masking to 0

A

AND is used with a 0

AS Level CS 9618 Paper 1 (9 decks)

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