Processor Architecture Summary Flashcards

Summarise PA

1
Q

Define Micro-architecture.

A

arrangement of registers, ALUs, FSMs, memories and other logical building blocks needed to implement architecture.

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2
Q

Define datapath.

A
Made up of memories, registers, ALUs and multiplexers.
//operates on 32 bit//
//it's basically made up of all the components learned when tracing paths//
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3
Q

What does the control unit do?

A

produces signals to control the operation of the datapath.

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4
Q

How many instructions can execute simultaneously for a pipelined processor?

A

5.

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5
Q

Define 5 stages of a single-cycle processor.

A

Fetch: read instruction from IM.
Decode: read source operands from register file and decodes the instruction to produce signals.
Execute: ALU computes current instruction.
Memory: read or writes data to memory.
Writeback
processor writes result to register if applicable.

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6
Q

What does computer performance depend on?

A
  • Processor performance

- Memory system performance

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7
Q

One Benefit and Con of using fully associate cache?

A

Reduces conflict misses. Extremely expensive to build

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8
Q

What uses the virtual address?

A

Programs

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9
Q

Where is the virtual address stored?

A

Harddrive.

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10
Q

Where is the physical address stored?

A

DRAM adresses.

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11
Q

How are virtual addresses translated into physical (DRAM) addresses?

A

Via the CPU.

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12
Q

Where is the data not in DRAM fetched from?

A

Harddrive.

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13
Q

What is the physical address comparable to?

A

The cache.

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14
Q

Where are most accesses hit?

A

Physical memory (remember it’s like the cache)

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15
Q

What do I/O interfaces do?

A

Manage comms. between peripherals and computer.

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16
Q

What does the clock do?

A

Generates signals for timers, PWM and other peripherals.

17
Q

What does the prescalar do?

A

Prescalar divides the clock feeding timer.

Timer freq.=syst. CLK speed/(prescalar+1).

18
Q

What does the Auto-Reload-Register do?

A

The ARR further divides the system to give the timer frequency.
Timer freq. = Syst. CLK speed/(prescalar+1)*ARR.

19
Q

What happens when an external interrupt (EXTI) is raised?

A

The MCU stops its current task, branches to an interrupt service routine (ISR) for the EXTI raised, then returns to the previous task after the ISR is executed.

20
Q

Differences between serial and parallel I/O?

A

Parallel has multiple bits per transmission whilst serial has a single bit per transmission and is faster.

21
Q

What is special about a Universal Asynchronous Receiver/ Transmitter (UART)?

A

A UART doesn’t need a CLK to function.

22
Q

Describe I2C interface.

A

Interface requires two lines:
SDA-bidirectional signal.
SCK-clock signal.