L5-6 Combinational Logic & Sequential Logic

Question 1

Define combinational circuits.

Answer 1

Outputs depend only on current inputs. Memoryless.

Question 2

Define sequential circuits.

Answer 2

Outputs depend on both current and previous values of the inputs. Circuits with memory.

Question 3

Define timing specification.

Answer 3

Specifies the lower and upper bounds on the delay from input to output.

Question 4

Define functional specification.

Answer 4

Expresses o/p values in terms of current input values.

Question 5

Define minterm.

Answer 5

Product involving all of the inputs to the function.

Question 6

Define maxterm.

Answer 6

Sum involving all of the inputs to the function.

Question 7

What do multiplexers (mux) do?

Answer 7

Allow user to choose between multiple inputs.

-2^k input bits and k select bits.

Question 8

What do decoders do?

Answer 8

Decoders select one o/p bit to be high and the rest to be low. k input bits produce to k output bits.

Question 9

How do you create a simple bistable element?

Answer 9

Connect two NOT gates (inverters) back-to-back/ criss-cross, with feedback. //This will produce a sequential circuit//

Question 10

Problems with bistable circuits?

Answer 10

Can’t be reset/ no input/ no user control.

Question 11

What does the S-R latch change about the simple bistable circuit?

Answer 11

Replaces NOT gates with NOR gates and adds a set and reset for user control.

Question 12

What happens when S-R Latch is reset and set to 0?

Answer 12

Output, Q, will equal Qprev i.e. memory state.

Question 13

What happens when S=1 and R=1?

Answer 13

The system can’t choose whether the output will be 1 or zero and states begin to contradict. Don’t set both to 1.

Question 14

How would you improve the SR Latch?

Answer 14

Make it a D-Latch. This will prevent S and R being 1 simultaneously.

Question 15

What does ‘D’ do in the D-Latch?

Answer 15

Controls what the state should be.

Question 16

What does ‘CLK’ do in the D-latch?

Answer 16

Controls when the state should change.

Question 17

What happens when the CLK is set to 0?

Answer 17

System becomes opaque and D cannot be set.

Question 18

What are the problems with the D Latch?

Answer 18

Updates its state continuously when CLK=1. //It’s often useful to update state only at specific time//

Question 19

How would you improve D-Latch?

Answer 19

Make it a D-Flip flop.

Question 20

What is a D-FF composed of?

Answer 20

Back-to-back D latches controlled by complementary clocks.

Question 21

How does a D-FF work?

Answer 21

CLK is set to 0 so master is transparent and slave is translucent. Signal is set as D=1 and this propagates to Q then through to N1,
CLK is then set to 1 so master becomes opaque and slave transparent, so N1 propagates from D to Q in the slave FF.
Therefore, what was copied into Q is what was there in D when the CLK went from 0 to 1.

Question 22

What is the rising edge time?

Answer 22

The moment when the CLK rises from 0 to 1 and when the value gets copied from D to Q in the DFF.

Question 23

What are registers composed of?

Answer 23

N-bit register is a bank of N flip-flops that share a common CLK.

Question 24

Problems for sequential circuits?

Answer 24

1. ) Astable circuits- i/p and o/p keep changing.
2. ) Race conditions- delays through different components mean information doesn’t get passed to the tight place in time (or passed too fast)
   - The o/p will become stuck.

Question 25

How do you improve a sequential circuit?

Answer 25

Create a synchronous sequential circuit by splitting the cyclic path by inserting registers. //E.g. FSM//

Question 26

What is a FSM composed of?

Answer 26

A circuit with k registers, next state logic and output logic.
-Register can be in one of 2^k states and stores the state.

Question 27

What are the two types of synchronous sequential circuits (i.e. FSMs)?

Answer 27

Moore Machine and Mealy Machine.

Question 28

What is the difference between a Moore Machine and Mealy Machine?

Answer 28

Output depends only on current state for Moore machine whilst a Mealy machine’s output depends on current state and current input.