Processor architecture Flashcards

1
Q

What is the Von Neumann bottleneck

A

Fetch and data operations can not occur at the same time with a shared bus

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2
Q

What is the Harvard architecture?

A

Data and instructions are stored in separate memory units with Separate buses

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3
Q

Advantages of Harvard over Von Neumann

A

While data is being written to and read from memory the next instruction can be read from memory therefore making it much faster

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4
Q

What is parallel processing?

A

When a computer carriers out multiple computations simultaneously to solve a given problem

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5
Q

What are the two ways parallel processing can be achieved?

A

Single instruction multiple data - A single instruction is carried out on multiple bits of data simultaneously
Multiple instruction multiple data - Multiple instructions are carried out on multiple bits of data simultaneously

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6
Q

What are super computers?

A

Massive parallel machines

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7
Q

+/- of super computers

A

+ Can tackle huge problems

  • energy consumption
  • cost a LOOOOTTTTTTTTT
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8
Q

What is distributed processing?

A

Developed as an alternative to parallel processing, it splits up parts of a problem across multiple machines on a network

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9
Q

What process does HLL go through when being converted into machine code?

A

HLL is complied by complier into assembly language. Assembly language is then converted into machine code with the use of an assembler

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10
Q

What is the Von Neumann architecture?

A

Memory CPU input/output all use same bus which means instructions are executed linearly.

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11
Q

+/- of CISC processors (Use)

A

+ Larger more feature rich instruction set
+ takes up less memory
+ Smaller code requiring less RAM
+ Less work for complier
- Instructions take multiple cycles to complete
- Slower: They may only need one instruction to be processed however they are slower as they take multiple cycles to complete the instruction.
- fewer general purpose registers

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12
Q

+/- of RISC processors (Use)

A
\+ Simpler instruction set and simpler hardware
\+ Faster clock speeds
\+ More general purpose registers
\+ consume less power 
\+ cheaper
\+ Instructions carried out in one cycle 
- smaller instruction set
- Limited instructions means the code has to be complied more 
- Longer code requiring more RAM
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13
Q

+/- of multicore systems

A
\+Faster with large data
\+Makes max use of CPU
\+Not limited by Von Neumann bottleneck 
-Not all data is suitable (all data must be independent from previous results)
-Costly
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14
Q

What advantages does RISC have in terms of manufacturing?

A
  • Simpler physical construction
  • Less complicated circuitry due to performing fewer instruction types
  • They are made smaller, use less power and generate less heat
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