Part 2 - Topic 1 - MIPS Architecture Flashcards
What does MIPS stand for?
Microprocessor without Interlocked Pipelined Stages
What is this in MIPS assembly code?
a = b + c
add a, b, c
What is the answer of this C expression in MIPS assembly code?
add t, b, c #t = b + c
sub a, t, d #a = t - d
What is lw?
Load a word ( = 4 bytes) of data at memory address 4 into $s3.
lw = load word
use 2 register operands and a constant
lw $s3, 4($0)
reads word at address 4 into $s3
If opcode is 0 what does that mean?
That it is a R-type instruction and function bits tell operation.
Otherwise opcode tells operation
MIPS: 32 × 32 multiplication
result and registers used
64 bit result
{hi,lo}
MIPS: 32-bit division
Output and register format
32-bit quotient, remainder
Quotient in lo
Remainder in hi
Moves from lo/hi special registers
- *mflo** $s2
- *mfhi** $s3
What is this in MIPS assembly code?
Not ‘j done’ sends the code to ‘done:’ and prevents code from going to ‘else’ clause after ‘if’ statement completion
How can this be written in assembly code?
sll: Shift Left Logical
One shift is the equivalent to raising value to power of 2.
In this case the 1 is the shift raising the value to a power of 2.
What are R-type instructions?
and, or, add, sub, slt
How do you calculate PC’?
(sign-extended immediate << 2) + (PC+4)
How do you convert Imm to signImm?
16 bits need to be added in front of the 16 bits of Imm,
This comes to 4 zeros added in hexadecimal