Overview of Digital Design with Verilog HDL

Question 1

Earliest digital circuits were designed with ____

Answer 1

vacuum tubes and transistors

Question 2

logic gates were placed on a ____

Era of Integrated Circuits (ICs)

Answer 2

single chip

Question 3

How many gates are in Small Scale Integration (SSI)?

Answer 3

fewer than 12 gates

Question 4

How many gates are in Medium Scale Integration (MSI)?

Answer 4

12 to 99 gates

Question 5

How many gates are in Large Scale Integration (LSI)?

Answer 5

100 to 9,999 gates

Question 6

design processes started getting very ____

Era of Integrated Circuits (ICs)

Answer 6

complicated

Question 7

designers felt the need to ____ the process

Era of Integrated Circuits (ICs)

Answer 7

automate

Question 8

____ began to evolve

Era of Integrated Circuits (ICs)

Answer 8

Computer-Aided Digital Designs

Question 9

How many gates are in Very Large Scale Integration (VLSI)?

Answer 9

10,000 to 99,999 gates

Question 10

How many gates are in Ultra Large Scale Integration (ULSI)?

Answer 10

100,000 to 999,999 gates

Question 11

it was ____ these circuits on a breadboard

Era of Integrated Circuits (ICs)

Answer 11

not possible to verify

Question 12

computer-aided techniques became critical for ____ of VLSI digital circuits

Era of Integrated Circuits (ICs)

Answer 12

verification and design

Question 13

____ of circuit layouts also became popular

Era of Integrated Circuits (ICs)

Answer 13

automatic placement and routing

Question 14

____ came into existence to verify the functionality of these circuits before they were fabricated on a chip

Answer 14

Logic simulators

Question 15

FORTRAN, Pascal, and C are ____ in nature

Answer 15

sequential

Question 16

designers felt the need for a ____, thus
Hardware Description Language (HDL)

Emergence of HDLs

Answer 16

standard language to describe digital circuits

Question 17

HDLs allow designers to model ____

Emergence of HDLs

Answer 17

concurrency of hardware elements

Question 18

____ became popular

Emergence of HDLs

Answer 18

Verilog HDL and VHDL

Question 19

Verilog HDL originated in 1983 at ____

Answer 19

Gateway Design Automation

Question 20

VHDL was developed under ____

Answer 20

DARPA

Question 21

a very verbose language

VHDL or Verilog HDL

Answer 21

VHDL

Question 22

strongly-typed

VHDL or Verilog HDL

Answer 22

VHDL

Question 23

similar to Ada or Pascal

VHDL or Verilog HDL

Answer 23

VHDL

Question 24

more compact (less code)

VHDL or Verilog HDL

Answer 24

Verilog HDL

Question 25

weakly-typed | VHDL or Verilog HDL

Answer 25

Verilog HDL

Question 26

similar to C | VHDL or Verilog HDL

Answer 26

Verilog HDL

Question 27

Even though HDLs were popular for logic verification, designers had to ____ with interconnections between gates | Emergence of HDLs

Answer 27

manually translate the HDL-based design into a schematic circuit

Question 28

The advent of ____ in the late 1980s changed the design methodology radically | Emergence of HDLs

Answer 28

logic synthesis

Question 29

Digital circuits could be described at a ____ | Emergence of HDLs

Answer 29

register transfer level (RTL)

Question 30

HDLs also began to be used for ____ e.g., FPGAs, ASICs, PALs | Emergence of HDLs

Answer 30

system-level design

Question 31

# Levels of Design 1. ____ 2. Behavioral Description 3. RTL Description (HDL) 4. Gate level Netlist 5. Physical Layout | Typical Design Flow (VLSI IC circuits)

Answer 31

Design Specification

Question 32

# Levels of Design 1. Design Specification 2. ____ 3. RTL Description (HDL) 4. Gate level Netlist 5. Physical Layout | Typical Design Flow (VLSI IC circuits)

Answer 32

Behavioral Description

Question 33

# Levels of Design 1. Design Specification 2. Behavioral Description 3. ____ 4. Gate level Netlist 5. Physical Layout | Typical Design Flow (VLSI IC circuits)

Answer 33

RTL Description (HDL)

Question 34

# Levels of Design 1. Design Specification 2. Behavioral Description 3. RTL Description (HDL) 4. ____ 5. Physical Layout | Typical Design Flow (VLSI IC circuits)

Answer 34

Gate level Netlist

Question 35

# Levels of Design 1. Design Specification 2. Behavioral Description 3. RTL Description (HDL) 4. Gate level Netlist 5. ____ | Typical Design Flow (VLSI IC circuits)

Answer 35

Physical Layout

Question 36

____ describe abstractly the functionality, interface, and overall architecture of the digital circuit | Typical Design Flow (VLSI IC circuits)

Answer 36

Specifications

Question 37

A ____ is created to analyze the design in terms of functionality, performance, compliance to standards, and other high-level issues | Typical Design Flow (VLSI IC circuits)

Answer 37

behavioral description

Question 38

The behavioral description is manually converted to an ____ in an HDL. | Typical Design Flow (VLSI IC circuits)

Answer 38

RTL description

Question 39

the design process is done with the assistance of ____ | Typical Design Flow (VLSI IC circuits)

Answer 39

Computer-Aided Design (CAD) tools

Question 40

____ tools convert the RTL description to a gate-level netlist. | Typical Design Flow (VLSI IC circuits)

Answer 40

Logic synthesis

Question 41

A ____ is a description of the circuit in terms of gates and connections between them | Typical Design Flow (VLSI IC circuits)

Answer 41

gate level netlist

Question 42

The gate-level netlist is input to an ____, which creates a layout | Typical Design Flow (VLSI IC circuits)

Answer 42

Automatic Place and Route tool

Question 43

The layout is ____ | Typical Design Flow (VLSI IC circuits)

Answer 43

verified and then fabricated on chip

Question 44

most digital design activity is concentrated on ____ of the circuit | Typical Design Flow (VLSI IC circuits)

Answer 44

manually optimizing the RTL description

Question 45

____ tools have begun to emerge recently | Typical Design Flow (VLSI IC circuits)

Answer 45

behavioral synthesis

Question 46

it is important to note that although CAD tools are available to automate the processes and cut design cycle times, ____ | Typical Design Flow (VLSI IC circuits)

Answer 46

the designer is still the person who controls how the tool will perform

Question 47

Designs can be described at a very ____ | Importance of HDLs

Answer 47

abstract level

Question 48

____ of the design can be done ____ in the design cycle | Importance of HDLs

Answer 48

Functional verification; early

Question 49

Designing with HDLs is analogous to ____. This provides a ____ , compared to gate level schematics. Gate-level schematics are almost incomprehensible for very complex designs. | Importance of HDLs

Answer 49

computer programming; concise representation of the design

Question 50

____ has evolved as a standard hardware description language

Answer 50

Verilog HDL

Question 51

Verilog HDL is a ____ hardware description language

Answer 51

general-purpose

Question 52

Verilog HDL allows ____

Answer 52

different levels of abstraction

Question 53

____ support Verilog HDL

Answer 53

Most popular logic synthesis tools

Question 54

All fabrication vendors provide ____ for postlogic synthesis simulation

Answer 54

Verilog HDL libraries

Question 55

The ____ is a powerful feature that allows the user to write custom C code to interact with the internal data structures of Verilog

Answer 55

Programming Language Interface (PLI)

Question 56

The most popular trend currently is ____ | Trends in HDLs

Answer 56

to design in HDL at an RTL level

Question 57

____ applies formal mathematical techniques to verify the correctness of Verilog HDL descriptions and to establish equivalency between RTL and gate-level netlists. Assertion checkers allows checking to be embedded in the RTL code. | Trends in HDLs

Answer 57

Formal verification techniques and assertion checkers

Question 58

For very high speed and timing-critical circuits like microprocessors, the gate-level netlist provided by logic synthesis tools is ____. In such cases, designers often ____ to achieve optimum results | Trends in HDLs

Answer 58

not optimal; mix gate-level description directly into the RTL description

Question 59

A trend that is emerging for system-level design is a ____ where the designers use either existing Verilog HDL modules, basic building blocks, or vendor-supplied core blocks to quickly bring up their system simulation | Trends in HDLs

Answer 59

mixed bottom-up methodology