Module 10: Memory Management Architecture Flashcards
virtual memory
memory that is allocated for storing its in-memory state. it is considered “virtual” because at creation, it is not yet mapped into physical memory locations. virtual memory is broken down in the code, data, stack, and heap segments, creating a standardized memory representation between all processes. virtual memory offers the OS a complete separation of logical and physical addresses
segmentation
divides the address space into variable sized segments or logical addressable units: code, stack, heap and data
virtual memory page
a contiguous block of virtual memory addresses of a fixed range, which is the same as page frames. a page is the smallest unit of addressability to virtual memory available to the OS for memory management. pages will not contain addresses from different segments of virtual memory.
paging
Paging is the technique by which the OS swaps in various virtual memory pages as they are needed as virtual memory is typically much larger than physical
memory.
MMU (memory management unit)
Translates virtual addresses to physical addresses. Divides the virtual address space into pages.
disk controller
enables the CPU to communicate with disk storage
swapping
space in the hard disk that operates as an extension of the RAM for portions of the process virtual memory that do not fit in RAM. Pages can be stored in the swap file to create room for other processes to execute in RAM.
page table
a table exists for each process to map from a page number to page frame
What is stored in the page table?
Validity bit: stored in the page table; 1 if a page is in memory and 0 if it is not
Protection bit: stored in the page table; set to read, write, or execute depending on the segment
Reference bit: stored in the page table; allows us to detect pages that are frequently used by setting this bit to 1 when a page is accessed
Modified (“dirty”) bit: stored in the page table; set to 1 if a page has been written to and 0 otherwise (on pure reads)
multi-level paging
Divide up the virtual addresses such that the highest order group indexes into a top level page table, the second highest order group indexes into the next level page table, and so on. When looking up in a multi-level page table, the
corresponding bits of the page number are used to index into each level until we get to the page table of interest.
This strategy is used because virtual memory is often larger
than physical memory and each process has its own page table, thus the total amount of memory required to store page tables needs to be managed.
TLB (transaction lookaside buffer)
small cache maintained within the MMU hardware
to lookup pages before we go to main memory to retrieve the page table. The TLB is associative memory.
inverted page table
stores entries in the form of (page-frame, process ID, and page number), which is like a hash table, to help find the desired page frames and avoid a linear search of the page table
offset
in the offset number, the lower order bits correspond to the offset at which we want to access addresses within a given page, and the higher order bits represent the page we want to access
page fault
when a page is requested but is not currently in physical memory; causes a trap to the kernel
page replacement
when a page is required, but physical memory is full, the page replacement process selects one of the current pages in physical memory to be written out to disk