MIPS(Microprocessor without Interlocked Pipelining Stages) Flashcards

1
Q

Reg file in MIPS architecture is….

A

small and fast

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2
Q

load and store functions are used to access data in the memory

A

it is slower and takes more energy than the register file (which is like cache and holds the current data that is being used by the current instruction in the current instruction register)

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3
Q

3 types of instructions in MIPS

A

Data Operations: add, sub, like ALU stuff
Data Transfer: load, store
Sequencing: conditional and unconditional branching instructions

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4
Q

lw R1, 126(R2)

A

Load word instruction, loads the word from the memory location ‘126+value in R2’ to R1(Destination Register)

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5
Q

MIPS has

A

32 General Purpose Registers, R0-R31

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6
Q

registers in MIPS are…

A

32 bits wide

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7
Q

R0

A

is always zero/ is hardwired to zero

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8
Q

Registers R29 and R3…

A

are used for function calls

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9
Q

Program counters

A

is a special register that keeps track of the current instruction

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10
Q

add r1,r2,r3 is the same as add r1,r3,r2

A

TRUE

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11
Q

R5=(R5+R6)+R7 needs at least 1 temporary register to be executed

A

FALSE,
No temporary registers needed since:
R5=R5+R6
and then
R5=R5+R7 (because value of R5 is now (R5+R6))

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