MIPS Items Flashcards
CPU Instruction
binary pattern of 0’s and 1’s.
Instruction Set (ISA)
the vocabulary of commands understood by a given architecture
CPU arch
collection of general specifications that CPU follows
Specification about CPU Architecture
instruction set, number and size of registers, word size, address size and etc.
Assembly Language
a symbolic representation of machine instruction
Requires programmer to write one line for every instruction that the computer will follow
What are the main properties of assembly languages?
- closely represent CPU instructions
- Assembly languages are architecture specific
List ex of Assembly Lang
MIPS for some old classic CPUs
x86 for Intel-style CPUs
ARM 8 for smartphone CPUs
What are pseudo-instructions
structions do not directly correspond to a single machine instruction in the MIPS instruction set
How many general-purpose registers do MIPS CPU have
32 general purpose register
each register is 4 bytes (word)
Can a register store nothing at all? Can some bits in a register store nothing at all?
NO a register cannot hold nothing even a pattern of all zero’s is still storing something
Name some MIPS general purpose registers.
$s0 - $s7, $t0 - $t7, $zero
What is stored in the register $zero? Are we allowed to change it’s content?
Constant value - and you are NOT allowed to change it
Immediate value in ADDI
Constant
Where is a variable stored?
IN RAM
What is loading the register?
Copying word of data from RAM to CPU register
SW
Copies the data from a register to memory.
Endianess. Big-endian and little-endian.
Computers either use the address of the leftmost or “big end” byte as the word address and those that use the rightmost or “little end” byte. MIPS uses big-endian.
What should we do to use the value of a variable?
load it from RAM to register
2’s complement representation of signed integers.
PRACTICE
Unsigned integer representation.
Practice
Know how to determine numeric limits for both 2’s complement and unsigned representations when given the number of bits.
General Range for n-bit Unsigned Integer:
0 - (2^n)-1
ex: 8 bits
0 - 255
2’s Complement:
Minimum value: -2^(n-1)
Maximum Value: 2^(n-1)-1
ex: 8 bits
-128 - 127
How do we specify memory address in loading and storing instructions?
offset($baseRegister)
What is the difference between lh and lhu, between lb and lbu?
Sign-extends
Why we don’t need separate signed and unsigned versions for storing instructions.
copying the bit pattern from a register to a memory location.
Converting 2’s Complement to Decimal
1.) Invert the bits
1111 1111 1111 1111 1111 1111 1111 0011
0000 0000 0000 0000 0000 0000 0000 1100
2.) ADD +1
0000 0000 0000 0000 0000 0000 0000 1100
0000 0000 0000 0000 0000 0000 0000 1101
3.) Convert to Decimal
-13
Does label exist as a separate item in the compiled program code?
No
j instruction. Label
label marks an instruction in the program code
What does label turn into in the compiled program code?
it turns to an address of the labeled instruction in RAM
Instructions beq and bne
beq register1, register2, L1 if ==
bne register1, register2, L1 if !=
What unconditional jumps do you know
J label
Instructions slt, slti, sltu, sltiu.
slt $t0, $s3, $s4 $t0 = 1 if $s3 < $s4
slti $t0, $s2, 10 $t0 = 1 if $s2 < 10
sltu (set on less than unsigned)
sltiu (set on less than immediate unsigned)
Be able to give an example of two parameters in form of bit patterns that produce different results in slt and sltu.
$t0 = 0xFFFFFFF3 is interpreted as -13
$t1 = 0x00000005 is interpreted as 5
slt $t2, $t0, $t1 # $t2 = 1 (SIGNED comparison -13<5)
versus unisgned
sltu $t2, $t0, $t1 # $t2 = 0 (huge number !<5 )
Be ready to implement common C++ statements like for, while, do-while, if-else, switch in MIPS. You should be able to preserve C++ behavior of those statements completely.
PRACTICE
Negative to binary
Ex: -53
52:
110100
Subtract from
1111 1111
00 11 0100
To get
1100 1011
