midterm study Flashcards
the output value, Q, only changes on the rising edge of G
keeps the internal SR latch from going into an invalid state
Is a great circuit to use in a register
D-Flip Flop
for an SR latch, what states are valid?
10
01
11
The output value, Q, changes with the D input as long as G is high
Keeps the interal SR latch from going into an invalid state
D- latch
what logic gate adds two bits together and ignores any carry
xor
Using an adder, when is there a carry?
both input bits are 1
the sum of the input bit is 1 and the carry in is 1
what binary number represents false?
0
zero
what binary number represents true?
1
one
_____ Gate: If both the inputs are high then the output is also high
AND
_____ Gate: If a minimum of one input is high then the output is High
OR
____ Gate: If the minimum one input is high then only the output is high
XOR
______ Gate: If the minimum one input is low then the output is high
NAND
____ Gate: If both the inputs are low then the output is high.
NOR
The Following truth table has what outputs with an AND gate
A B
0 0
0 1
1 0
1 1
Output
0
0
0
1
if one of the two inputs of an AND gate is zero (0) then the output will be ____
zero
The Following truth table has what outputs with an OR gate
A B
0 0
0 1
1 0
1 1
Output:
0
1
1
1
If one of two the inputs to the OR gate is 1 then the output will be _____
One
In a NOR gate, the input One (1) creates an output _____ and an input of Zero (0) gives and output of _____
Zero
One
The Following truth table has what outputs with an NAND gate
A B
0 0
0 1
1 0
1 1
Output
1
1
1
0
The _____ gate is a digital logic gate with ‘n’ i/ps and one o/p, that performs the operation of the AND gate followed by the operation of the NOT gate.
NAND
If one or both of two inputs to the NAND gate is zero (0) then the output will be _____
One
The _____ gate is a digital logic gate with n inputs and one output, that performs the operation of the OR gate followed by the NOT gate.
NOR
If the inputs are both one’s then the output is 0 and if the inputs are both zero’s then the output is One other wise if a single input is one then the output is zero for what gate?
NOR gate
The Following truth table has what outputs with an XOR gate
A B
0 0
0 1
1 0
1 1
0
1
1
0
The _____ gate is a digital logic gate with two inputs and one output. The short form of this gate is Ex-OR. It performs based on the operation of the OR gate. . If any one of the inputs of this gate is high, then the output of the EX-OR gate will be high.
XOR
If the inputs are both one’s then the output is zero and if the inputs are both zero’s then the output is zero, other wise if a single input is one then the output is One for what gate?
XOR gate
Carry Look Ahead
Input:
a b c
Sum:
s = ______________
Propagate:
p = ______________
Generate Signal:
g = _________________
s = a ⊕ b ⊕ c
p = a + b
g = ab
Carry Look ahead:
- there is no ____ ____
- singal p and g do NOT depend on ___
carry out
c
Ripple Adder:
Cin of a bit comes from the C of the ____ ____
Daisy chain multiple Full Adders
lower bit
What two things cause a carry?
x =1 && y=1 ← generation (g)
(x =1 || y=1) && Cin ← propagation (p)
carry look ahead formula
g = xy
p = x xor y
there is a carry to a higher bit if:
Carry generated by current bit (g=1)
OR There is a carry from the lower bit AND the current bit can propagate it
Formula: C = g + pCin
Carry look ahead 3 outputs:
g = xy
p = x⊕y
S = x⊕y⊕Cin
Note: p and g do not depend on Cin!!
Constructed using a circuit attached to an adder
Subtracting is simply adding a 2’s complement
To get 2’s complement:
Complement each bit
Add one to the right most bit.
Subtracter boolean equation
X-Y == X+(-Y)
mplementing negation:
XOR with 1 negates
Add 1 by making Cin on the adder 1 when XORing 1
associative property
A ∧ (B ∧ C) = (A ∧ B) ∧ C
A ∨ (B ∨ C) = (A ∨ B) ∨ C
Commutative property
A ∧ B = B ∧ A
A ∨ B = B ∨ A
A ∨ (B ∧ C) = (A ∨ B) ∧ C
A ∧ (B ∨ C) = A ∧ (B ∨ C)
A ∧ B ∧ C = C ∧ B ∧ A
Distributive property
A ∨ (B ∧ C) = (A ∨ B) ∧ (A ∨ C)
A ∧ (B ∨ C) = (A ∧ B) ∨ (A ∧ C)
Identity law
A ∧ True = A
B ∨ False = B
Complement law
A ∨ A’ = True
B ∧ B’ = False
Idempotent law
A ∨ A = A
B ∧ B = B
double negation law
(A’)’ = A
((A ∧ B)’)’ = A ∧ B (same for ∨)
(A ∨ B’)’ ≠ A ∨ B
de Morgan’s Law
(A ∧ B)’ = A’ ∨ B’
(A ∨ B)’ = A’ ∧ B’
Absorptive law
A ∧ (A ∨ B) = A
A ∨ (A ∧ B) = A
Which logic gate essentially adds two bits together, albeit ignoring any carry.
XOR
Using an adder, when is there a carry?
Both input bits are 1
The sum of the input bits is 1 and the carry in is 1
How is the decoder like the multiplexer. How is it different? Both at the circuit level, and in the logic behind them
Both the decoder and the multiplexer are used to control signals. AND gates make up the inner circuits of both the decoder and multiplexer. Multiplexers often have an OR gate to output its results. There can be multiple inputs for both decoders and multiplexers, but multiplexers normally selects a singular input and decoders have a single true output line through conversion. Multiplexers are often in the form of 8:1 or 16:1 while decoders are in the form of 2:4 or 4:16. The decoder is a logic circuit with the intention of outputting 2^n lines, while the multiplexer is intended to be a selector.
P
A
Ozzy
Is
My
Dads
Detective
Level 5- Problem-Oriented
Level 4- Assembly
Level 3- Operating System
Level 2- Instruction
Level 1- Machine
Level 0- Digital logic
Level -1- Device
negative
milli
micros
not
pushy
for
a
zoo
yack
milli
micro
nano
pico
femto
atto
zepto
yocto
positive
kara
mara
got
to
park
e-
z
yeezy
kilo
mega
giga
tera
peta
exa
zetta
yotta
(D3 S1 S0) + (D2 S1 ~S0) + (D1 ~S1 S0) + (D0 ~S1 ~s0)
Multiplexer
Q3 = S1 S0 E
Q2 = S1 ~S0 E
Q1 = ~S1 S0 E
Q0 = ~S1 ~S0 E
Decoder
Half Adder
g = __ ___
p = ___ ____ ___
S = ____ ____ ____ ___ ____
X Y
X xor Y
X cor Y xor CIN
full adders attached by cin and cout
ripple adder
Look Ahead adder
S = ___ ___ __ __ __
C = ( ____ ( __ __ ___) __ ___ ___
A xor B xor CIN
CIN A xor B + A B
