MEMS DMRS Test Knowledge Flashcards

1
Q

What subassembly does the DMRS Eeprom failure point to? What troubleshooting can be done?

A

DMRS EEprom failure is the interface PBA
- Reprogramming the interface PBA is a trouble shooting method

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2
Q

When looking at the GYRO BITE Failures, what method is best to use?

A

Ignore everything on the top and use the last self test

The test does not check for the self test BITs
- Tests the BIT is set and then cleared
- Look at the last normal mode fault check (last BIT check at the end of the 8 seconds)

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3
Q

What are RXD files? How can we view the files?

A

RXD ARE RAW DATA FILES
-WE CANNOT OPEN THEM AND VIEW
-On the test station, the raw data can be converted to a file to read the raw data
oTalk to Kelly

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4
Q

What are characteristics of the power isolation test?

A

Power isolation tests
- One time test
- boeing wanted dieletric test
-

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5
Q

What is different between the results files from the DMRS and AH1000?

A

Unlike AH1000 the results file is overwritten

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6
Q

What are a few tests done in integration for DMRS?

A

-Setting up the device configuration file
-A BITE check (contains data from the digital ASIC that the gyro uses to run and uses the FPGA

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7
Q

Is there a difference between the power up sequence in HASS and ATP?

A

No, the power up sequence in hass is the same in ATP

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8
Q

What is the difference between the AH1000 test files and DMRS test files?

A

There is only one file that contains PN/SN gyro config file, cal coefficients in DMRS.

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9
Q

What are some characteristics of the self test mode for the DMRS?

A

Self test mode
-get the gyro started (take 1.5 sec to p-lock)
-1.5 sec starts at self test
-Some cases failures caused the DMRS fail in self test which the DMRS wont go to self test
-It will set a bit (SELF TEST)
-Some cases the failures wont prevent the DMRS to go default mode

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10
Q

What are some characteristics of Default mode?

A
  • Waiting for p-lock
  • A can value that sends out rates (same value)
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11
Q

What Lesson goes into depth of start ups for DMRS?

A

Lesson 3 goes into depth of what start up

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12
Q

What’s a condense version of the power up sequence right when the box is turned on?

A
  1. Power is applied
  2. FPGA reads EEPROM file
  3. FPGA writes configuration data to Gyro CCA
  4. Self-Test completes, wait for PLOCK
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13
Q

What does the EEPROM file have?

A

DMRS Memory

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14
Q

What happens when the FPGA writes configuration data to the Gyro CCA?

A

FPGA WRITES CONFIGURATION DATA TO GYRO CCA
- Sends data to the analog ASICS
- ASIC sends the data back to the FPGA TO VERIFY THE DATA MATCHES

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15
Q

Where is the EEPROM located on the Interface CCA?

A

The U1

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16
Q

How can CCA workcell help with EEPROM failures?

A

They can do probe tests or reprogram with the correct FPGA version.

17
Q

What is a visual representation of the PLOCK?

A

Control loop

18
Q

How is the drive side setup on the PLOCK control loop?

A

Setup based on the receiving side of the control loop

19
Q

What is a short summary of how plock is done?

A

The analog ASIC (control loop or drive side) gives the sensor a kick/push while trying to control it to get it to the right frequency within three attempts. This is done hopefully in 1.5 seconds.

20
Q

Why are ASICs screened?

A

They are screened in order to ultimately help the gyro card sensor die to achieve the frequency needed. There is big overdrive from the ASIC at the beginning which makes it hard to control

This is why editing the offset voltage in the analog ASICs and digital ASICS where done

21
Q

What is one difference between the AC01 and AB01?

A

AC01 and AB01 have different normal mode transitions time

22
Q

What is different between each sensor?

A

Each sensor has their own frequency.