Memory Mapped Input/Output

Question 1

Memory contains

Answer 1

flash memory
RAM
other flash/RAM

Question 2

what connects the processsing unit and memory device

Answer 2

the memory bus

Question 3

how many memory buses are there

Answer 3

one, this means that the processing unit can only communicate with one memory device ata time

Question 4

what are the three parts of the memory bus

Answer 4

control bus
data bus
address bus

Question 5

what does the control bus do

Answer 5

controls communication between the processing unit and memory device

Question 6

what does the address bus do

Answer 6

carries the address of the location we want to store the data in/load the data from

Question 7

how many electronic connections are in the address bus, why

Answer 7

32 electronic connections

1 for each bit of the address were looking to store.load

Question 8

can memory devices overlap when assigned space in memory

Answer 8

no

Question 9

what does GPIO stand for

Answer 9

general purpose input/output

Question 10

do microcontrollers include both microprocessors and peripherals

Answer 10

yes, system on chip

Question 11

what instructions are used to communicate between peripherals and processor

Answer 11

ldr and str

Question 12

some of the peripherals on our microprocessor include

Answer 12

flash memory
RAM
USB
Ethernet
Timers
GPIO

Question 13

what is the sysTick timer

Answer 13

a timer integrated into the ARM coretx m4

Question 14

what value does the systick timer begin counting down from

Answer 14

the value that is loaded into it

Question 15

when the systick timer reaches 0 what happens

Answer 15

it resets and restarts counting down again from the load value

Question 16

why does the sysTick timer count down in miliseconds and not seconds

Answer 16

it only takes in a 24 bit value and this isn’t big enough for 1 second

Question 17

what does CSR stand for

Answer 17

control and status register

Question 18

the bit 0 is the CSR is used to what

Answer 18

enable and disable the timer

Question 19

bit 1 in the CSR is used for what

Answer 19

enable and disable the timer interrupt

Question 20

bit 2 in the CSR is used for wha

Answer 20

clock source

Question 21

bit 3 in the CSR is used for what

Answer 21

reads as 1 if the timer has reached 0 since the last time we read it

when read itll be set to 0

Question 22

how to reset teh internal counter to 0

Answer 22

write any value to the value register

Question 23

what does the value register do

Answer 23

timer counter

Question 24

what is polling

Answer 24

repeatedly reading the value in the systick timer until it reaches 0 and then stopping the subroutine

Question 25

what does the syntax 0b1«13 mean

Answer 25

binary shifted left by 13 bits

makes a 1 in position 13 and 0s everywhere else

Question 26

what is an interrupt

Answer 26

they interrupt the current program when some external device tells it to, beginning another program, executing it and returning to the current program once complete

Question 27

what are exceptions

Answer 27

events outside the normal flow of the program, can occur at unpredictable times

Question 28

examples of exceptions

Answer 28

processor fetches the next address from memory but its not a valid instruction

timer completes counting down

trying str to a ROM address

Question 29

what is a non maskable interrupts

Answer 29

the system cannot configure itself to ignore these interrupts

Question 30

what is a hard fault

Answer 30

arise during the handling of another exception

Question 31

when do memManage and bus faults occur

Answer 31

when trying to load and store from memory and something goes wrong

Question 32

what is a usage fault

Answer 32

trying to run an execution that cannot be run

Question 33

how to hide the side effects of an exception subroutine

Answer 33

acknowledge it at the end of the subroutine

Question 34

how do exceptions raised know which exception subroutine to go to

Answer 34

using the exception vector table

Question 35

what does FTSR stand for

Answer 35

falling trigger selection register