Memory Flashcards

1
Q

CPU can only address process where

A

main memory and registers

cannot address I/O or hard disk

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2
Q

CPU time to access GPR versus main memory

A

GPR 1 clock tick, 1 cycle (1/f)

Cache between main memory and registers

Main memory 4-20 cycles

CPU to main memory taking many cycles can cause a stall

CPU needs instructions every cycle or it will stall

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3
Q

CPU addressable memory

A

16 bit addresses 2^16 = 64k memory

2^20 = 1 M memory

2^22 = 4M

32 bit addresses 2^32 = 4 GB

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4
Q

RISC

A

Reduced instruction set computer 1 cycle per instruction

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5
Q

Contiguous memory allocation for a process (base/limit registers)

A

Implemented in OS with the help of two registers, the base and limit registers. When a process is executing in main memory, its base register contains the starting address of the memory location where the process is executing, while the amount of bytes consumed by the process is stored in the limit register. A process does not directly refer to the actual address for a corresponding memory location. Instead, it uses a relative address with respect to its base register. All addresses referred by a program are considered as virtual addresses. The CPU generates the logical or virtual address, which is converted into an actual address with the help of the memory management unit (MMU). The base address register is used for address translation by the MMU. Thus, a physical address is calculated as follows:

Physical Address = Base register address + Logical address/Virtual address

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6
Q

CPU generates what kind of addresses

A

Logical (also known as virtual)

Not physical - physical is address seen by memory unit

old - preserve contiguous property of program or jumps will fail (not true now)

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7
Q

Address binding of instructions and data to memory - types

A

Compile time - absolute; must recompile if address changes (static binding)

Load time - relocatable code; space interval same but start (base) may be different (moved base and limit)

Execution time - can be moved from one memory segment to another (dynamic binding)

DLL dynamic link libraries have addresses in some other module

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8
Q

Memory Management Unit (MMU)

A

Hardware device that maps virtual to physical address

Value in relocation register is added to address generated by a user process at the time process is sent to memory

CPU —-logical addr – MMU — physical addr —- memory

relocation

register

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9
Q

Static vs dynamic linking

A

Static - sys library and prgm code combined by loader into bin prgn image (compile - link - load)

Dynamic - not linked until execution time

small piece of code, stub is placeholder for libr routine

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10
Q

Swapping

A

process swapped in and out of memory to temp space on disk

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11
Q

Context switching, as related to swapping

A

Total time = time ut + time in

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12
Q

Structured program language evolved to

A

Object oriented programming (OOP)

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13
Q

Malloc - memory allocation

A

Memory map:

0 1000

X hole

500

x hole

5000

9999

MMU maps dynamically

shuffle to come up with 7000 free contiguous memory

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14
Q

Dynamic Storage Allocation Problem (for contiguous memory space)

A

How to satisfy a request of size N from list of free holes

  1. First fit - allocate first hole that is big enough
  2. Best fit - allocate smallest hole that is big enough (must search entire list, unless ordered)
  3. Worst fit - allocate the largest hole (also must search entire list)

produces largest leftover hole

First and best better for speed and storage utilization

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15
Q

Fragmentation definition and types

A

Def - holes in memory space not used

Types - External: pieces everywhere, not contiguous

Internal: allocated > requested

size difference internal to a partition

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16
Q

Compaction

A

Reduces external fragmentation

Shuffle memory contents to place all free memory together in one large block

Latch problem in memory while involved in I/O

Done at execution time, takes time

17
Q

Segmentation versus contiguous memory

A

segmentation evolved from contiguous memory

addressable segments became known as pagination

18
Q

Contiguous memory

A

Contiguous memory allocation is a classical memory allocation model that assigns a process consecutive memory blocks (that is, memory blocks having consecutive addresses).

19
Q

Number of bits to address segment base and limit value 16M

A

16M = 2^4 need 4 bits

20
Q

Calculate MA memory access time if memory 1/4 as fast as CPU

A

MA = 4 * CPU speed

CPU speed = 1/f

21
Q

Main memory partitions

A

Low memory - resident OS with interrupt vector

high memory - user processes

Relocation registers used to protect user processes from each other, and from changing operating-system code and data