Brainscape's Knowledge GenomeTM

Browse over 1 million classes created by top students, professors, publishers, and experts.


See full index

Electrical Level 3 and 4 > Logic > Flashcards

Logic Flashcards

1
Q

NOT Gate (Inverter) specs

A
  • Output is opposite the input
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

OR Gate specs

A
  • Any high gives a high
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

AND Gate specs

A

Any low gives a low

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

NOR Gate specs

A

Any high gives a low

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

NAND Gate specs

A

Any low gives a high

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

XOR Gate specs

A

Any high gives a high but not both

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

XNOR Gate secs

A

Any high gives a low but not both

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

What does Boolean Algebra define?

A

Logic (AND, OR, NOT etc.) applied to anything that has only 2 states

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

Logic (and computers) can also be accomplished _____ (DNA. neurons) or _____ or _____.

A

Organically
Optically
Chemically

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

Complex problem involving many logic functions can be greatly simplified by applying?

A

Boolean Laws

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

Idempotent rule (Redundancy rule)

A 
AA = A
A + A= A
A1 = A
A0 = A
A + 1 = 1
A + 0 = A
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

Law of Complementation

A

A(not A) = 0
A + (not A) = 1
(not not A) = A

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

Demorgans Laws

A

AKA Alternate Logic

  • To “demorganize” or determine the alternate logic for a gate:
    1) Invert the inputs
    2) Change the gate (or sign)
    3) Invert the output
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

Demorganization can only be applied to 2 levels of logic?

A
  • a product of sums

- a sum of products

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
15
Q

Another method to Demorganize is to “________________”

A

Break the line and change the sign

You can not break more than one line at a time but you can break one line more than once in a single step

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
16
Q

Commutative Law

A 
AB = BA
A+B = B+A
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
17
Q

Distributed Law

A

A(B+C) = AB + AC

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
18
Q

Associative Law

A

A(BC) = C(AB)

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
19
Q

Laws of Absorption

A

A(A + B) = A

A + (AB) = A

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
20
Q

Human to machine =

A

Encoding

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
21
Q

Machine to human =

A

Decoding

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
22
Q

Human encoding forms

A

Numbers, letter, symbols
Video
Audio

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
23
Q

Machine decoding forms

A 
Binary
Octal
Hex
BCD
ASCII
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
24
Q

Flip flops are used as ______ devices?

A

Memory

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
25
Q

What are the 4 types of FFs?

A
  1. SR NOR and NAND
  2. Clocked RS
  3. D type
  4. JK
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
26
Q

SR NOR and NAND are both what type of FF?

A

Asynchronous

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
27
Q

SR NOR FF specs

A
  • Active High
  • Q is set with a 1 on S
  • Q is reset with a 1 on R
  • 00 is the memory/no change state
  • 11 is the prohibited/illegal state
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
28
Q

SR NAND FF specs

A
  • Active Low
  • Q is set to a 1 with a 0 on S
  • Q is reset to a 0 with a 0 on R
  • 11 is Memory function
  • 00 is prohibited function
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
29
Q

Clocked RS FF specs

A
  • Synchronous
  • When there is a 0 on CLK the outputs are frozen
  • 1 on CLK and 0 on RS is memory state
  • 111 is prohibited state
  • Set with a 1 on CLK and S
  • Reset with a 1 on CLK and R
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
30
Q

JK FF does not have prohibited state, instead at 11 it is?

A

Toggle state

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
31
Q

For JK FF, Q output is ____ the clock frequency?

A

1/2

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
32
Q

What are the asynchronous parts of a JK FF?

A

PRS and CLR

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
33
Q

PRS and CLR are active ____?

A

Low

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
34
Q

0 on PRS Q =

A

1

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
35
Q

0 on CLR Q =

A

0

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
36
Q

A 1 on both PRS and CLR is?

A

Toggle mode for JK

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
37
Q

What is the most popular gate to use to make all other gates?

A

NAND

also least power consumption

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
38
Q

A modulus 16 counter counts from ___ to ____

A modulus 10 counter counts from ___ to ____

A

0-15

0-9

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
39
Q

For an up counter, use the ____ function and the ___ output

A

CLR

Q

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
40
Q

For a down counter use the ____ function and the __ output?

A

PRS

Not Q

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
41
Q

What is a shift register?

A

A chain of FFs used to move binary data from one location to another
ex. calculator display is a shift left register

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
42
Q

Serial Loading

A
  • Data is entered 1 BIT at a time

- An 8 BIT BYTE requires 8 clock pulses

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
43
Q

Parallel Loading

A
  • Data is moved simultaneously with one pulse
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
44
Q

Serial Out

A
  • Data is shifted out 1 BIT at a time
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
45
Q

Parallel Out

A

Data is shifted out all at once

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
46
Q

Simplifying circuits should always be done to?

A
  • Reduce cost
  • Power consumption
  • Space
  • Time
How well did you know this?
1
Not at all
2
3
4
5
Perfectly
47
Q

Another name for flip flop?

A

Latch

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
48
Q

Astable multivibrator =

A

Oscillator

49
Q

Monostable multivibrator =

A

One shot

50
Q

Bistable multivibrator =

A

Flip flop AKA Latch

51
Q

FFs build basic building blocks for what types of circuits?

A

Counters and Memory

Shift Registers

52
Q

Which FF has no invalid state?

A

JK

53
Q

Which FF is the most widely used?

A

JK

54
Q

On a timing or waveform diagram the horizontal distance stands for _____ and the vertical distance stands for ____?

A

Time

Volts

55
Q

The FF is a basic digital circuit with a _____ characteristic that can be used to store info.

A

Memory

56
Q

The FF circuit is also called a?

A

Bistable multivibrator

57
Q

The outputs are always _____ logic levels

A

Binary

58
Q

What makes a FF synchronous?

A

A clock input

59
Q

The clocked FF is normally in the sync or async mode?

A

Sync

60
Q

FF are wired together to form?

A

Counters

Registers

61
Q

Name one application of the simple RS FF?

A

Bistable multivibrator

Switch debouncer

62
Q

What do shift registers do in a simple calculator?

A

Store temporary data

63
Q

What are the 2 common classifications of shift registers?

A

Serial

Parallel

64
Q

Advantages and disadvantages of serial?

A

Slower but simple and less wiring

65
Q

Advantages and disadvantages of parallel

A

Faster, more wiring, more complex

66
Q

On a logic probe the green LED =

A

logic 0

67
Q

On a logic probe the red LED =

A

Logic 1

68
Q

The basic 555 configuration is used for?

A

Multivibrators

ex. clocks, timers etc.

69
Q

2 main types of logic gate families?

A
  1. CMOS (Complimentary Metal Oxide Semi Cons)

2. TTL (Transistor Transistor Logic)

70
Q

CMOS specs

A
  • FET type transistors
  • High efficiency
  • Achieved using insulated gates
  • Voltage supply 3V to 18V
71
Q

Precautions to take when handling CMOS devices?

A
  • Grounding straps with wrist bands
  • Grounded mats on our work benches
  • Static rated packaging
72
Q

TTL specs

A
  • Use BJT transistors
  • More robust but not as efficient
  • Voltage supply 5V + or - 0.25V
73
Q

IC Pin Out =

A

How the gates are connected to the pins of the IC

74
Q

IC Fan Out =

A

The number of gates that an output can drive

75
Q

Operational amps are a relatively ___ power amp

A

Low (about 1/2W)

76
Q

Op Amps are used as ?

A

Building blocks for industrial processes

  • comparators
  • integrators
  • differentiators
77
Q

For op amps the Gain, input Z, output Z, bandwidth are dependent on?

A

The external components we connect

78
Q

2 types of op amp inputs?

A

Inverting

Non-inverting

79
Q

The output of an op amp is _______ times the difference between the inputs?

A

200,000

80
Q

Inverting amp formula

A 
Gain = Rf/Rin
Vout = -Vin(Rf/Rin)
81
Q

Voltage follower op amp specs

A

Buffer
Gain = 1 (unity)
Used to isolate circuits

82
Q

Non inverting amp formula

A

Gain = A = Rf/Rin + 1

83
Q

Summing Amp formulas

A

Vout = - (V1 Rf/R1 + V2 Rf/R2 + V3 Rf/R3)

84
Q

Summing amp if R1 = R2 = R3 = Rf then the voltages will be ?

A

Added together

85
Q

Summing amp is R1 = R2 = R3 = 3 x Rf then the voltages will be?

A

Averaged

86
Q

Integrator amp, Vout varies?

A

How long the input has been applied

87
Q

Differentiator amp, Vout varies?

A

With how quickly the input is changing

88
Q

An integrator op amp is essentially a?

A

low pass filter

89
Q

Integrator op amp has more output if frequency is?

A

Lower

90
Q

Integrator Vout formula?

A

Vout = -Vin x 1/RC x T

91
Q

Integrator output is proportional to the?

A

Product of the amplitude and duration of the input signal (area under the curve)

92
Q

Integrator op amp suffers from?

A

Drift , any DC offset voltage will cause the integrator to drift and eventually saturate

93
Q

What is placed in parallel with the capacitor in a integrator op amp to reduce drift?

A

A high value resistor

94
Q

A differentiator op amp responds to ?

A

rate of change of the input signal

95
Q

A differentiator op amp is essentially a ?

A

High pass filter

96
Q

for a differentiator op amp more output if frequency is?

A

Higher

97
Q

differentiator op amp instantaneous output is proportional to?

A

Instantaneous rate of change at its input

98
Q

differentiator op amp Vout formula?

A

Vout = -RC x (change in Vin/ change in time)

99
Q

differentiator op amp suffers from?

A

High frequency noise gain

100
Q

What will limit the high frequency noise gain on a differentiator op amp?

A

A resistor in series with the input capacitor

101
Q

What kind of transistor are used in the TTL family of logic ICs?

A

BJTs (bipolar junction)

102
Q

What kind of transistor are used in the CMOS family of logic gate ICs?

A

FET (mosfets)

103
Q

Traditionally which of the two families of ICs has had the lowest power dissipation rating?

A

CMOS

104
Q

Which of the two families has had the lower propagation delay?

A

TTL

105
Q

The TTL family come in the ____ series. The military uses the ____ series?

A

7400

5400

106
Q

The operating voltage of TTL ICs is?

A

5V +/- 0.25V

107
Q

What is meant by the term noise margin as applied to logic gates?

A

Difference between valid input and output for highs and for lows

108
Q

In general which family of ICs has the largest fan-out?

A

CMOS (50)

109
Q

The CMOS family of ICs uses the _____ series and the ___ series?

A

4000A and 4000B

110
Q

A typical fan-out for a standard TTL IC is about ____ and a CMOS is about ____?

A

10

50

111
Q

The minimum output high of a TTL gate is?

A

2.4V

112
Q

The minimum input high of a TTL gate is?

A

2.0V

113
Q

The max output low of a TTL gate is?

A

0.4V

114
Q

The max input low of a TTL gate is?

A

0.8V

115
Q

Which logic gate family is most susceptible to damage from static electricity?

A

CMOS

116
Q

Which logic gate is family is most likely to have errors introduced by noise signals added to the coupling connections?

A

CMOS

117
Q

What should be done with an unused input to an OR gate?

A

Tied low

118
Q

What else could you do with the unused OR gate input if you were not concerned with a fan out of a preceding gate?

A

Tied to another unit

119
Q

What should be done with an unused input to an AND gate?

A

Tied high

Electrical Level 3 and 4 (10 decks)

Brainscape helps you reach your goals faster, through stronger study habits.
© 2024 Bold Learning Solutions. Terms and Conditions