Lecture 4 Flashcards
What are the main levels of memory hierarchy and their characteristics?
Primary Memory: Fastest, smallest, most expensive (e.g., cache memory).
Secondary Memory: Larger, slower, less expensive (e.g., RAM).
Tertiary Memory: Largest and slowest (e.g., hard drives, tapes).
What is the purpose of cache memory?
To bridge the speed gap between the CPU and main memory by storing frequently accessed data.
What are cache hits and misses?
Cache Hit: Data found in cache.
Cache Miss: Data not found in cache, must be fetched from main memory.
Explain spatial and temporal locality in the context of cache memory.
Spatial Locality: Nearby data is likely to be accessed soon.
Temporal Locality: Recently accessed data is likely to be accessed again.
Describe the three main cache mapping techniques.
Direct Mapping: Each main memory block maps to one specific cache block.
Fully Associative Mapping: Any block can be placed in any cache block.
Set-Associative Mapping: Compromise between the two, with cache divided into sets, and each block mapping to a set.
What are the fields used in set-associative mapping?
Tag: Identifies a block within a set.
Set: Identifies the specific set.
Word: Identifies the element within the block.
What are common cache replacement techniques?
Random Replacement: Replace a random block.
FIFO: Replace the oldest block.
LRU: Replace the least recently used block.
LFU: Replace the block with the fewest accesses.
How does the CPU interface with main memory?
Using the Memory Address Register (MAR) and Memory Data Register (MDR).
MAR: Holds the address of the data.
MDR: Holds the data to be written or read.
Describe the internal structure of main memory.
Organized in rows and columns of memory cells, each storing one bit. Rows form memory words, with address decoder activating one row at a time.
What is the design of a memory cell in static CMOS technology?
Each cell consists of six transistors, forming two back-to-back inverters, capable of existing in two stable states.
