Lecture 10 Flashcards
How do the processor and I/O devices exchange data?
- Devices can input (keyboard, network card, USB port, scanner) or output (printer, display card, speakers, NIC) data with different I/O rates.
- CPU and RAM have the fastest I/O rates.
- Slower devices send interrupt signals to get the CPU’s attention.
- Direct Memory Access (DMA) allows data transfer between devices and memory without CPU intervention.
Describe the steps for data exchange between the processor and I/O devices.
CPU processes data/codes in its caches.
CPU caches get data from RAM.
RAM gets data/codes from input devices.
Data passes through buses to CPU/RAM/devices.
CPU issues instructions on which device should communicate.
Devices use IRQ signals to get CPU’s attention.
What is a Shared I/O Arrangement?
Address and data lines from the CPU are shared between memory and I/O devices using control lines.
Address decoder circuitry and status registers identify I/O devices.
Advantages of Shared I/O Arrangement
Advantage: Separation of memory address space and I/O devices.
Disadvantages of Shared I/O Arrangement
Disadvantage: Special input and output instructions are needed in the processor’s instruction set.
What is Memory-Mapped I/O Arrangement?
Processor’s read and write instructions perform I/O operations without special I/O instructions.
Advantage of Memory-Mapped
Advantage: Eliminates need for special I/O instructions.
Disadvantage of Memory-Mapped
Disadvantage: Reduces available memory address space.
Describe Programmed I/O.
Processor executes input instruction from a device.
Address decoder circuitry in each input device checks if it is the identified device.
Enabled buffers in the specified device output data on the data bus.
Instruction decoding channels data from the data bus into a specific CPU register.
What is Interrupt-Driven I/O?
Devices send interrupt signals to get the CPU’s attention.
CPU serves the interrupting condition and then resumes its previous activity.
Interrupts can be from hardware or operating systems.
Describe the steps of Direct Memory Access (DMA).
Device driver sets up DMA channel’s address and count registers and data transfer direction.
DMA controller initiates data transfer.
Data moves, addresses increment, and word count reduces.
DMA informs the CPU of transfer completion via an interrupt.
CPU regains access to the memory bus.
How can devices get their data to the CPU for processing?
I/O Polling: CPU regularly checks device status indicators.
Interrupt-Driven I/O: Device or OS sends interrupt signals to the CPU.
Direct Memory Access (DMA): Devices transfer data directly to/from memory without CPU intervention.
What is a bus in computer terminology?
A physical connection used to carry signals (address, data, control, or power) from one point to another.
What are the types of buses?
Address bus: Carries memory location addresses.
Data bus: Carries data to/from devices, RAM, CPU.
Control bus: Carries control signals to data paths.
Power bus: Carries power-supply/ground voltage.
What are synchronous and asynchronous buses?
Synchronous bus: Data transfer is in rhythm with the system clock.
Asynchronous bus: Data transfer is based on data availability using handshaking.
