L15 - Networking Flashcards
What is the communication hierarchy in a data center?
Server NIC –> Top of the Rack Switch –> Cluster Switch
What are 4 interface mechanism for networking?
- Register and queue based device interface
- Memory mapped I/O, virtual memory, user/kernel modes
- Direct memory access (DMA)
- Interrupts and polling
What is DMA?
separate engine to transfer blocks of data between an I/O device & memory (without involving the CPU)
How does DMA work?
- CPU describes the transfer to the DMA engine (source address, destination address, transfer size, type)
- DMA engine performs memory/IO read/writes
- DMA engine completes transfer by sending interrupt to CPU
note: CPU can execute other code during the DMA transfer
What are the advantages of DMA?
It decouples data transfer from processing and thus:
- CPU does not need to copy data to/from device
- Doesn’t pollute CPU cache
- Can be processed when the CPU (or OS) decides
- Higher-performance: CPU and device work in parallel
When is DMA disadvantageous?
for very small transfers: higher setup overhead
Steps of DMA for ‘writing’?
- Allocate DMA-able buffer with packet data
- Write DMA descriptor to NIC
- NIC DMA engine copies data for transmission
- TX completion notification (interrupt)
- Deallocate buffer
Steps of DMA for ‘reading’?
- Allocate buffer for received packet
- Write DMA descriptor to NIC
- NIC DMA engine copies data to host
- RX notification to host (interrupt)
- Forward received packet to user application
What are the possible ways of solving DMA and cache inconsistencies?
- CPU can map DMA buffers non-cacheable
- Cache can “snoop” DMA bus transactions (but doesn’t scale beyond small SMP systems)
- OS can explicitly flush/invalidate cache regions
- Direct cache access
What are the consequences of using physical addresses for DMA?
If physical address, DMA engine does not need to worry about translation. But there are a few things to watch out for:
- Need to use pinned addresses (cannot remap for non-IO use)
- The physical addresses in a multi-page transfer may not be contiguous –> need to break up into page-size DMA transfers
What are the consequences of using virtual addresses for DMA?
DMA engine needs to handle translation.
Particularly useful when we have virtual machines sharing I/O device.