L14 - Storage / Memory Flashcards

1
Q

List some different storage technologies

A
  1. SRAM
  2. DRAM
  3. Flash
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2
Q

List properties of SRAM.

A
  1. Fast access
  2. No refreshes to worry about
  3. Simpler manufacturing
  4. Less transistors
  5. Higher cost
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3
Q

List properties of DRAM.

A
  1. Much higher capacity
  2. More transistors
  3. Lower cost
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4
Q

What is SRAM suitable for?

A

registers and L1-L3 caches

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5
Q

What is DRAM suitable for?

A

stand-alone memory chips

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6
Q

What about embedded DRAM?

A

good for L3-L4 caches

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7
Q

How is parallelism achieved in DRAM?

A

with multiple:
- Channels
- Ranks
- Banks
- Chips

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8
Q

5 basic commands of DRAM

A
  1. ACTIVATE (open a row)
  2. READ (read a column)
  3. WRITE
  4. PRE-CHARGE (close row)
  5. REFRESH
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9
Q

DRAM Row Buffer Management Policies

A
  1. open row policy
  2. closed row policy
  3. adaptive
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10
Q

What are the pro and con of open row policy?

A

+ : Next access might need the same row -> row hit!
- : Next access might need a different row -> row conflict

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11
Q

How is a DRAM address composed?

hint: 3 values

A

Address = (Bank x, Row y, Column z)

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12
Q

How do the banks operate?

A

Banks operate independently, but share command/address/data pins.

  • Each bank can have a different row active
  • Can overlap ACTIVATE and PRE-CHARGE latencies (i.e. READ to bank 0 while ACTIVATING bank 1)
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13
Q

What does a DRAM controller do?

A
  1. map “Physical Address” to DRAM Address
  2. buffer and schedule requests (to improve performance)
  3. refresh: ensure correct operation
  4. manage power consumption
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14
Q

What is Flash?

A

semiconductor, non-volatile memory technology

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15
Q

T/F: Disk is a magnetic storage technology.

A

T

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16
Q

What are the characteristic of Flash storage compared to a mechanical disk?

A
  1. lower latency
  2. higher bandwidth
  3. lower power
  4. lighter weight, smaller size
  5. shock resistance
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17
Q

What are the characteristics of multi-level cell compared to single-level cell?

A
  1. slower but denser
  2. less reliable
  3. cheaper
18
Q

Where is the multi-level cell technology used?

A

consumer drives (thumb, cheap SSDs)

19
Q

Where it the single-level cell technology used?

A

enterprise drives

20
Q

What are the two types of flash? What is the issue that they both have?

A
  1. NOR
  2. NAND
  • both are damaged after some number of write/erase cycles
21
Q

How is parallelism achieved in flash storage systems?

A

With use of multiple
- controllers
- channels
- chips
- blocks
- pages

22
Q

What is the minimum unit of read/write?

A

page

23
Q

What is the minimum unit of erase?

A

block

24
Q

What kind of bit change happen during a write?

A

Only 1 -> 0 transitions are allowed

25
Q

What happens to the bits in the block during erase?

A

All bits are set to 1

26
Q

Why does 99% read workload get half of the throughput compared to 100% read workload?

A

Because read waits for slow writes/erases to complete
and
each chip can process one operation at a time

27
Q

What if we want to share Flash (use same device for multiple applications, different tenants)?

A

Unpredictable performance: reads of one application suffer from interference with write of other application

28
Q

How would one circumvent that issue?

A

isolation mechanisms:
1. I/O scheduler
2. rate limit

29
Q

List 3 reliability issues of Flash.

A
  1. Wear out
  2. Writing disturb
  3. Read disturb
30
Q

What does wear out mean?

A

Flash cells are physically damaged programming and erasing them.

31
Q

What does writing disturb mean?

A

Programming pages can corrupt the values of other pages in the block.

32
Q

What does read disturb mean?

A

Reading data can corrupt the data in the block.

It takes many reads to see this effect.

33
Q

What is FTL?

A

Flash translation layer: tries to make flash look like a disk

  1. Exposes a block-based interface (like a disk)
  2. Manages program/erase granularity mismatch
  3. Equalises wear
  4. Delivers high performance
34
Q

What kind of address mapping is FTL responsible for?

A

logical –> physical

35
Q

What is write amplification?

A

number of physical pages written to flash for every logical page

(ratio is above 1)

36
Q

How can we reduce write amplification?

A
  1. reserve extra capacity on Flash (more clean blocks will be available, garbage collect less often)
  2. make your program write sequentially
  3. store frequently written data in memory
37
Q

How does one implement wear leveling?

A
  1. Keep statistics on number of write/erase cycles
  2. Erase blocks with low erase counts, move data to new location when current block starts to wear out
38
Q

How/why do FTL implementations use DRAM?

A
  1. Store logical to physical mappings for fast lookups
  2. Queue requests
  3. Buffer writes to hide high write latency
39
Q

List Flash SSD server interfaces?

A
  1. SATA
  2. SAS
  3. PCIe
40
Q

What happens if your PC fails due to an error in the SSD and reboots?

A

The garbage will still be there. :(