L14 - Storage / Memory Flashcards
List some different storage technologies
- SRAM
- DRAM
- Flash
List properties of SRAM.
- Fast access
- No refreshes to worry about
- Simpler manufacturing
- Less transistors
- Higher cost
List properties of DRAM.
- Much higher capacity
- More transistors
- Lower cost
What is SRAM suitable for?
registers and L1-L3 caches
What is DRAM suitable for?
stand-alone memory chips
What about embedded DRAM?
good for L3-L4 caches
How is parallelism achieved in DRAM?
with multiple:
- Channels
- Ranks
- Banks
- Chips
5 basic commands of DRAM
- ACTIVATE (open a row)
- READ (read a column)
- WRITE
- PRE-CHARGE (close row)
- REFRESH
DRAM Row Buffer Management Policies
- open row policy
- closed row policy
- adaptive
What are the pro and con of open row policy?
+ : Next access might need the same row -> row hit!
- : Next access might need a different row -> row conflict
How is a DRAM address composed?
hint: 3 values
Address = (Bank x, Row y, Column z)
How do the banks operate?
Banks operate independently, but share command/address/data pins.
- Each bank can have a different row active
- Can overlap ACTIVATE and PRE-CHARGE latencies (i.e. READ to bank 0 while ACTIVATING bank 1)
What does a DRAM controller do?
- map “Physical Address” to DRAM Address
- buffer and schedule requests (to improve performance)
- refresh: ensure correct operation
- manage power consumption
What is Flash?
semiconductor, non-volatile memory technology
T/F: Disk is a magnetic storage technology.
T
What are the characteristic of Flash storage compared to a mechanical disk?
- lower latency
- higher bandwidth
- lower power
- lighter weight, smaller size
- shock resistance
What are the characteristics of multi-level cell compared to single-level cell?
- slower but denser
- less reliable
- cheaper
Where is the multi-level cell technology used?
consumer drives (thumb, cheap SSDs)
Where it the single-level cell technology used?
enterprise drives
What are the two types of flash? What is the issue that they both have?
- NOR
- NAND
- both are damaged after some number of write/erase cycles
How is parallelism achieved in flash storage systems?
With use of multiple
- controllers
- channels
- chips
- blocks
- pages
What is the minimum unit of read/write?
page
What is the minimum unit of erase?
block
What kind of bit change happen during a write?
Only 1 -> 0 transitions are allowed
What happens to the bits in the block during erase?
All bits are set to 1
Why does 99% read workload get half of the throughput compared to 100% read workload?
Because read waits for slow writes/erases to complete
and
each chip can process one operation at a time
What if we want to share Flash (use same device for multiple applications, different tenants)?
Unpredictable performance: reads of one application suffer from interference with write of other application
How would one circumvent that issue?
isolation mechanisms:
1. I/O scheduler
2. rate limit
List 3 reliability issues of Flash.
- Wear out
- Writing disturb
- Read disturb
What does wear out mean?
Flash cells are physically damaged programming and erasing them.
What does writing disturb mean?
Programming pages can corrupt the values of other pages in the block.
What does read disturb mean?
Reading data can corrupt the data in the block.
It takes many reads to see this effect.
What is FTL?
Flash translation layer: tries to make flash look like a disk
- Exposes a block-based interface (like a disk)
- Manages program/erase granularity mismatch
- Equalises wear
- Delivers high performance
What kind of address mapping is FTL responsible for?
logical –> physical
What is write amplification?
number of physical pages written to flash for every logical page
(ratio is above 1)
How can we reduce write amplification?
- reserve extra capacity on Flash (more clean blocks will be available, garbage collect less often)
- make your program write sequentially
- store frequently written data in memory
How does one implement wear leveling?
- Keep statistics on number of write/erase cycles
- Erase blocks with low erase counts, move data to new location when current block starts to wear out
How/why do FTL implementations use DRAM?
- Store logical to physical mappings for fast lookups
- Queue requests
- Buffer writes to hide high write latency
List Flash SSD server interfaces?
- SATA
- SAS
- PCIe
What happens if your PC fails due to an error in the SSD and reboots?
The garbage will still be there. :(
