Intel Flashcards
PME
Product marketing engineer — the person responsible for formulating requirements for specific
product features and customer parameters (licenses, prices, distribution channels, etc.)
TCE
Technical Consulting Engineer — a member of product team, who provides technical consulting on
the product and the technologies supporting the product.
Product
The basic unit that Intel designs, builds, licenses and sells (e.g. Intel® Parallel Studio XE
Professional Edition).
Product group
A set of products that are grouped together based on some property, for example, if they
have the same approved product name (like ‘Parallel Studio XE’) but different editions.
Product owner
In Agile system, Product owner is a scrum development role for a person who represents
the business or user community and is responsible for working with the user group to determine what
features will be in the product release. Typically, a project’s key stakeholder. Part of the product owner
responsibilities is to have a vision of what he or she wishes to build, and convey that vision to the scrum
team. … The Scrum product owner’s job is to motivate the team with a clear, elevating goal.
Product variation
A set of attributes that defines different physical characteristics of a product: OS, host,
programming language, etc. (e.g. Intel® Parallel Studio XE 2018 Professional Edition for Fortran and C++
Windows*)
Intel Corporation Org Chart
IAGS
Intel Architecture, Graphics and Software (former CVCG – Core and Visual Computing Group). A
strategic business group within the Intel organization that includes CPDP since April 2018.
CPDP
Compute Performance & Developer Products - (former DPD - Developer Products Division), part
of IAGS, delivers software products to establish an influence point that helps drive value to the Intel
hardware platform through scalable ecosystem enabling of platform features, performance, and
compatibility. On April 2, 2020 a new Business Unit (BU) is formed - One Intel Software & Architecture
(OIGA – [‘oiga; o’aiga]) that consists of engineering organizations to align with the software stack and a
shared software product organization that will be responsible for the software products that we take to
market. We will also create a software architecture team, and a software business strategy team.
MLP
Machine Learning Performance – a new org unit under IAGS, developing software alongside
CPDP, with a focus on machine learning. Comprises Intel Data Analytics Acceleration Library (DAAL),
OpenVINO Toolkit, and other units.
SPS
Software Products Services, a member of IAGS/ISC, that enables and ensures professional, timely
and high-quality IAGS software products. A Business Unit providing installation, automation,
documentation, validation, and productization services to CPDP products. As announced on Apr 2, 2020,
will be restructured and renamed to Product Infrastructure team headed by Ivan Kuzmin.
InfoDev
Embedded Computing, Debuggers and Libraries. ECDL is a department in CPDP, part of
IAGS. ECDL ensures Intel is the platform of choice for embedded and compute intensive applications
through world-class embedded development tools, debuggers, runtimes, and libraries that maximize Intel
platform differentiation and customer development productivity. As announced on Apr 2, 2020, will be
restructured and renamed to Debuggers, Libraries, & Java Engineering (DLJE) team. Part of
Developer Software Engineering team.
IPL
Intel Performance Libraries. A department within ECDL developing Intel Math Kernel Library
(MKL), Intel Performance Primitives Lib (IPP), Intel Data Analytics Acceleration Library (DAAL), Intel
Autonomous Driving Library (AD Lib, ADL), Intel Threading Building Blocks (TBB).
ICL
Intel Compiler Labs or, more recent, Intel Compilers and Languages. The Intel Compiler Labs
develop the Intel Compilers.
TCAR
The Technical Computing, Analyzers, and Runtimes team is one of the departments within
CPDP, part of IAGS. Responsible for running CPDP’s Technical & Enterprise Computing (TEC) business,
both the Enabling part as well as the Revenue part. Provides software technology & products to all DPD’s
segment businesses: TEC, Mobile & Embedded. The tools and technologies increase the demand for
Intel multi-core platforms by allowing software developers to productively create scalable parallel
applications and extract maximal performance. Among other responsibilities, TCAR designs the
discovery, performance and confidence analysis tools in Intel Parallel Studio XE, Cluster Studio XE and
the TBB, Cilk and OpenMP runtimes. Includes Intel VTune Amplifier, Intel Inspector, Intel Advisor,
and Intel Graphics Performance Analyzer (GPA) recently renamed to GDP (Graphics Development
Products) headed by Gary Baldes (Oregon). As of April 2, 2020, restructured within a new DSE org unit – see the above org charts).
PLC
Product Life Cycle - The Intel Product Life Cycle is a high-level framework, which is the process
used to take a product from market research through production and eventually to product
discontinuance. See Platform and Product Life Cycles page.
POR
Stands for Plan of Record. This refers to a benchmark plan, often one with proven historical
results. This may be used as a baseline for comparison or evaluating improvements in methods,
processes, technologies, etc. The existence of a plan generally means that everyone is committed and
resources have been allocated.
IPA
Implementation Plan Approval. This is a meeting where the decision is made that all requirements
for the product release and launch are completed.
PRD
Product Requirements Document. A collaboratively developed document that describes the
standard product feature set, business plan, and product requirements in sufficient detail to enable
product planning, design, and development.
Launch process
Preparing and performing marketing activities and delivering new products to the
customers. Launch process starts with the decision on IPA meeting and ends on FCS date.
Release process
Preparing the product package for delivery to the customers. It starts with the decision
on IPA and ends on RTM date. Pre-release activities, covered by SPS services: integration, installation
and documentation development, start earlier.
Code Freeze
All planned code modifications (including bug fixes) are implemented. Only critical bug
fixes are allowed.
Feature Freeze/Complete
All features as defined by IPA (or by last amended PRD) are integrated. No
feature-blocking bugs remain open. No new requirements, configuration or features will be allowed unless
via an emergency change request.
IDP
Internal Development Package. Unlike test packages, an IDP is validated and the validation effort
for the package is tracked. This package is created to support product development efforts and will be
placed in the a or b or p directory. The goal of an IDP is to integrate the product early and find
bugs prior to the release cycle. The number of IDPs can be negotiated within the program (including PV).
The validation target is negotiated with PV. PV disposition of IDPs is Failed/Previewed IDPs are not
released to anyone outside of Intel. Often, no one outside of the product team.
RC
Release Candidate - Complete software product that, per the component owners, is ready to be
shipped to customers. This package will be checked against all tests in the product validation plan. If it
passes the release criteria for this product, it is RTMd. Applied to all release types. PV performs a full
validation, or the negotiated level of validation.
