Input/Output (I/O) Interfacing Flashcards
a subsystem of components that moves coded data between external devices and a host system, consisting of a CPU and main memory.
Input/Output (I/O)
depends upon the size of computer and the peripherals connected to it
I/O Organization
An external device attached to the computer by a link to an I/O module
Peripheral Device
Common Input/Output devices
Monitor
Keyboard
Mouse
Printer
Magnetic tapes
Three categories of external/peripheral device
Human readable
Machine readable
Communication
A type of peripheral device suitable for communicating with the computer user
Human readable
A type of peripheral device suitable for communicating with equipment, such as sensors and actuators
Machine readable
A type of peripheral device suitable for communicating with remote devices such as a terminal, a machine readable device, or another computer.
Communication
I/O subsystems
Blocks of main memory
Buses
Control modules
Interfaces to external components
Cabling or communications links
exact form and meaning of the signals exchanged between a sender and a receiver
protocol
the receiver must acknowledge the commands and data sent to it or indicate that it is ready to receive data. This protocol exchange is called
handshake
Signals comprised by protocol
command signals
status signals
data-passing signals
serve as interfaces between the CPU and its peripherals
Dedicated I/O modules
provides a method for transferring information between internal storage (such as memory and CPU registers) and external I/O devices.
Input – Output Interface
special hardware components between the CPU and peripherals to supervise and synchronize all input and out transfers.
Interface Units
I/O Module Function that coordinates the flow of traffic between internal resources and external devices.
Control and timing
I/O Module Function that involves command decoding data status reporting address recognition.
Processor communication
I/O Module Function that detect and reports transmission errors
Error detection
I/O Module Function that performs the needed buffering operation to balance device and memory speeds.
Data buffering
I/O Module Function that involves commands, status information and data.
Device communication
It defines the typical link between the processor and several peripherals.
I/O BUS and Interface Module
four types of I/O commands
Control
Test
Read
Write
I/O Command that is used to activate a peripheral and tell it what to do
control
I/O Command that is used to test various status conditions associated with an I/O module and its peripherals.
test
I/O Command that causes the I/O module to take an item of data from the data bus and subsequently transmit that data item to the peripheral.
write
I/O Command that causes the I/O module to obtain an item of data from the peripheral and place it in an internal buffer
read
the address and data lines from the CPU can be shared between the memory and I/O devices
Shared I/O arrangement
Devices and memory share an address space. I/O looks just like memory read and memory write
Memory – Mapped I/O
Separate address spaces. Need I/O or memory select lines.
Isolated I/O
different I/O techniques
programmed i/o
interrupt-driven i/o
Direct Memory Access (DMA)
refers to data transfers initiated by a CPU under driver software control to access registers or memory on a device. sometimes called polled I/O.
Programmed I/O
Instead of the CPU continually asking devices whether they have input, the devices tell the CPU when they have data to send
Interrupt-Driven I/O
The circuit that handles interrupt signals from all I/O devices in the system
intermediary interrupt controller
recognizes interrupt signals from any of its attached devices, it raises a single interrupt signal that activates a control line on the system bus
Interrupt controller
Type of interrupt where the signal for the processor is from external device or hardware
Hardware Interrupt
The hardware interrupts which can be delayed when a much highest priority interrupt has occurred to the processor
Maskable Interrupt
The hardware which cannot be delayed and should process by the processor immediately
Non Maskable Interrupt
It is a software interrupt caused by the software instructions
normal interrupt
It is a software interrupt caused by unplanned interrupts while executing a program
exception
a special hardware that manages the data transfers and arbitrates access to the system bus.
Direct Memory Access Controller
device can transfer data directly to and from memory, rather than using the CPU as an intermediary.
Direct Memory Access
DMA controller three registers
address register
data count register
control logic
