Hardware and Communication

Question 1

What is the role of the Control Unit?

Answer 1

=> Coordinates all activities of the CPU.

=> Directs flow of data between the CPU and other devices (including memory).

=> Accepts the next instruction, decodes it, handles the execution, and stores the resulting data back in memory or registers.

=> Send memory read and memory write requests to main memory on the control bus as well as other command and control signals such as bus requests, bus grants, interrupt requests etc.

=> Makes extensive use of status register and clock.

=> Coordinates and communicates with all parts of the CPU.

Question 2

What is the role of the Status Register?

Answer 2

=> Contains information about the state of the processor.

=> Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor.

=> These bits can be thought of as “flags” which are set on and off as appropriate.

=> These flags can be checked at any point.

Question 3

What is the role of the clock?

Answer 3

=> The “clock” is the electronic unit that synchronises related components by generating pulses at a constant rate.

=> Measured in Hertz.

=> The clock speed is the frequency at which the internal clock generates pulses.

=> The higher the clock rate, the faster the computer may work.

Question 4

What is the role of the Arithmetic Logic Unit?

Answer 4

=> Performs arithmetic and logical operations on data.

=> Arithmetic operations on fixed and floating point numbers: ADD, SUBTRACT, MULTIPLY, DIVIDE.

=> Bite-wise shift operations left and right.

=> Boolean Logic Operations: Comparison, AND, OR, NOT, XOR.

=> Often uses general purpose registers to temporarily hold the results of calculations.

Question 5

What is the purpose of General Purpose Registers?

Answer 5

=> Tiny areas of extremely fast memory located in the processor

=> Normally designed for a specific purpose.

=> Data or control information is often stored here temporarily.

=> A CPU may have many general purpose registers for storing temporary data while instructions/calculations are being carried out.

=> Typically the more general purpose registers a processor has, the faster it may operate.

Question 6

What is the purpose of a Program Counter?

Answer 6

=> Holds the address of the next instruction to be executed.

=> E.g., the next instruction in a sequence of instructions or, if the current instruction is a command to jump or branch, it would be the address to which to jump. This would be copied from the current instruction register.

=> Has a very close relationship with the memory address register. At the start of every new F-D-E cycle the address held in the PC is copied to the MAR.

Question 7

What is the purpose of the Memory Address Register?

Answer 7

=> Holds the addresses of memory locations from which data or instructions are to be fetched, or to which data is to be written.

=> Sends these addresses to memory down the address bus.

Question 8

What is the purpose of the Memory Buffer Register?

Answer 8

=> Used to temporarily store the data which is read-from or written-to memory.

=> Sometimes known as the Memory Data Register (MDR) and often nicknamed the “Gateway to the processor”.

=> All data to and from memory must travel down the data bus and pass through the MBR.

Question 9

What is the purpose of the Current Instruction Register?

Answer 9

=> Holds the current instruction being executed.

=> The contents of the MBR are copied to the CIR if it is an instruction.

=> Contains the operator + operand(s) of the current instruction.

=> Instruction = operator + operand(s).

=> E.g., a machine language instruction to load the contents of location 1000 into the ALU might look something like: LDA 1000.

Question 10

What is the role of the Accumulator?

Answer 10

=> Used by any instruction that performs a calculation
=> Many instructions operate on, or update, the accumulator (ACC)
=> Calculations take a step-by-step approach, so the result of the last calculation is part of the next calculation
=> In a certain computer system, a set instruction may use the ACC as part of the calculation
=> Only one value needs to be given in the data part of the instruction

Question 11

Describe a CPU with Von Neumann Architecture.

Answer 11

=> Shared memory space for instructions and data.

=> Instructions and data are stored in the same format.

=> A single control unit or processor follows a linear fetch, decode, execute cycle.

=> One instruction at a time.

=> Registers are used as fast access to instructions and data.

Question 12

Describe a CPU with Harvard Architecture.

Answer 12

=> Instructions and data stored in separate memory units.

=> Both data and instructions have their own buses.

=> Reading and writing data can be done at the same time as fetching an instruction.

=> Used by RISC processors.

Question 13

What is the Von Neumann Bottleneck?

Answer 13

Time and clock cycles are wasted because the speed mismatch between the processor and the memory.

Question 14

How can the problem of the Von Neumann Bottleneck be overcome?

Answer 14

By using cache memory which acts as the ‘middle man’ between the processor and the memory.

Question 15

How does cache memory operate within a CPU?

Answer 15

=> Data and instructions that are used regularly are copied into the cache memory, so that when the processor needs this information it can be retrieved much faster than if it were stored in RAM.
=> The processor always tries to load data from the cache, and in the event that the data is not in cache memory, the data is instead copied from RAM.
=> If cache memory is full, the least used data is discarded and replaced with new data.

Question 16

How is it ensured that the most regularly accessed data is stored in cache memory?

Answer 16

=> Many algorithms can be used.
=> Programs tend to spend a lot of their time spent in a loop of some description, meaning that a lot of their execution time will be spent working on the same instructions.
=> 80/20 rule; states that 80% of a program’s execution time is spent in only 20% of the code, and proves to be fairly accurate in most cases.

Question 17

What is a cache miss?

Answer 17

When a processor requests data that is not in the cache.

Question 18

What is the primary focus of the algorithm employed to manage cache?

Answer 18

It’s primary focus is to avoid cache misses. This is because a system with a high incidence of cache misses, will have a substantially reduced speed overall.

Question 19

How does memory cache differ between levels?

Answer 19

=> Level 1: extremely fast but relatively small; usually embedded within the CPU.
=> Level 2: higher memory capacity than level 1, but operates more slowly as a result. It may be located on the CPU, in which case it will be dedicated to single or pairs of cores; or it could be located on a separate chip, allowing it to avoid being slowed down by traffic on the main system bus.
=> Level 3: works to improve the performance of Levels 1 and 2; typically shared by all cores of a processor.

Question 20

What critical problem do most modern computers share as a result of the Von Neumann architecture?

Answer 20

Speed mismatches between memory, secondary storage and the processor mean that most of the processors time is spent idle. This is known as the Von Neumann Bottleneck.

Question 21

What is meant by parallel processing?

Answer 21

=> The use of multiple processors within the same system, to increase computational power.
=> Necessary because the physical limit of the number of transistors that could be fit on a silicon chip was reached, meaning that other means of increasing the processing power of computers was required.
=> Tend to be referred to as dual-core and quad-core computers.

Question 22

Why was parallel processing needed?

Answer 22

=> The classic Von Neumann architecture uses only a single processor to execute instructions.
=> This meant that the only way to increase processing speed was to fit more transistors onto a chip, however a new method of increasing processing power was needed when the physical limit for transistors was reached; this new method was parallel processing.

Question 23

How does parallel processing work?

Answer 23

=> Two or more processors work together to perform a single task.
=> Task is split into smaller sub-tasks (threads).
=> These are executed simultaneously by all available processors (any task can be processed by an processor).
=> Greatly increases processing speed, but requires specially written software to take advantage of multi-core systems.

Question 24

Why do all the cores in a multi-core system continuously need to communicate with eachother?

Answer 24

In order to ensure that if one processor changes a key piece of data, the other processors are aware of the change and can incorporate it into their own calculations.

Question 25

What makes implementing parallel processing so complex?

Answer 25

When each core has completed its own task, the results from all the cores need to be combined to form the complete solution to the original problem.

Question 26

What was different about parallel processing in early days of parallel computing? Why did this change?

Answer 26

=> It was still sometimes faster to use a single processor, as the additional time taken to coordinate communication between processors and combine their results was greater than the time saved by sharing the workload.
=> This issue was overcome as programmers became more adept at creating software specially designed for utilizing parallel processing.

Question 27

What are the advantages of parallelization?

Answer 27

=> More instructions can be processed in a shorter time because they are executed simultaneously.
=> Tasks can be shared to reduce the load on individual processors and avoid bottlenecks.

Question 28

What are the disadvantages of parallelization?

Answer 28

=> It is difficult to write programs for multi-core systems.
=> Results from different processors need to be combined at the end of processing, which can be complex and adds to the time taken to execute the program.
=> Not all tasks are parallelizable.
=> Concurrency introduces new classes of software bugs.

Question 29

What are the limiting factors of parallelization?

Answer 29

Programs written specifically for parallel processing may have certain portions of code that are unable to be parallel processed, meaning that regardless of the number of cores used to execute the program, the minimum runtime cannot be less than the time taken to execute the non-parallelisable portion which must be sequentially processed.

Question 30

What is Amdahl’s Law?

Answer 30

Amdahl’s Law is used to calculate the minimum runtime of executing a program on a certain number of threads:

T(n) = T(1) * (B + 1/n (1 - B))

Where:
=> T(n) = time taken on ‘n’ threads
=> T(1) = number of threads
=> B = fraction of the algorithm that is sequential

Question 31

What is the Fetch-Decode-Execute (FDE) cycle?

Answer 31

A process used to load instructions into the processor one after the other.

Question 32

What are the stages of the FDE cycle?

Answer 32

Stage 1: Fetch the next instruction for processing; The program counter is copied over to the memory address register, and the program counter is incremented. Since most programs run serially - unless a control instruction such as a jump is encountered - incrementing the program counter will mean that it is highly likely that the next instruction will be fetched.

Stage 2: In order for the processor to execute the instruction after fetching it, it must decode the opcode part of the instruction. The memory data register’s contents are copied over to the current instruction register, where the instruction can then be decoded and executed.

Question 33

Why is it necessary to have separate registers for fetching and executing instructions?

Answer 33

=> In order to fetch data, the address found in the memory address register is looked up and the contents of that memory address are loaded into the memory data register.
=> As memory is much slower than the processor, the fetch could take multiple of clock cycles to complete and depends on whether the data is found in cache memory.
=> An advantage of the FDE cycle is that while one instruction is being fetched, another is being decoded and executed.

Question 34

How does the processor try to be one step ahead of itself in order to make most efficient use of memory and clock cycle?

Answer 34

As the first instruction is being decoded, the second is being fetched, while the program counter is pointing to the third.

Question 35

What is a ‘jump’ instruction?

Answer 35

=> A jump breaks the FDE cycle and forces it to start again from scratch, because the next instruction that has been fetched, is not the next instruction that should be executed.
=> Slow down the processor by losing the benefits of pipelining, meaning that it’s important to limit the number of jump commands when programming in Assembly, or when a compiler optimises code.

Question 36

How is processor speed measured?

Answer 36

=> Measured by the number of clock cycles (a single ‘tick’ of the CPU clock) that the processor can perform in a second.
=> Measured in hertz (Hz).

Question 37

What can occur during a clock cycle?

Answer 37

The processor can fetch, decode and execute a simple instruction, such as load, store or jump; but more complex instructions may take more than one cycle.

Question 38

What equations can be used to calculate the time taken for a single clock cycle for any speed of processor?

Answer 38

=> Frequency = 1 / Time;

=> Time = 1 / Frequency;

Question 39

Why do processors need a heat sink?

Answer 39

=> When the number of clock cycles per second is increased, the transistors within the processor have to move faster, generating more heat.
=> The processor will overheat unless the heat is drawn away from the processor, since a processor can reach excess of 300 ‘C in a matter of seconds.

Question 40

What could happen if a system is run without a heat sink?

Answer 40

=> Permanent damage could be caused to the motherboard and processor.
=> Potential fire risk.

Question 41

What other methods do processor manufacturers such as AMD and Intel try to increase the performance of their processors?

Answer 41

=> Increasing the number of cores in the CPU.
=> Optimizing existing circuitry.
=> Developing new instructions.

Question 42

What is required to ensure fair comparisons between processors?

Answer 42

Controlled tests.

Question 43

What are assembly languages?

Answer 43

A simple architecture designed to help users understand the concepts of machine code and instruction sets.

Question 44

What is the Little Man Computer (LMC)?

Answer 44

An assembly language with a very limited instruction set.