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Comp. Org. Arch. > Final test > Flashcards

Final test Flashcards

1
Q

What did the earliest electronic computers resemble?

A

A calculator.

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2
Q

Modern computers also arrange for the processor to control external devices.

A

T

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3
Q

The earliest external devices attached to computers consisted of independent unites that operated under control of the CPU.

A

T

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4
Q

An interface between a computer and an external device is classified as parallel.

A

T

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5
Q

Control functions for most devices are primar.

A

F

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6
Q

The digital signals used internally by a processor are not sufficient for what?

A

Communication with an external device

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7
Q

What is interface controllers?

A

The hardware that provides the interface to an external device.

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8
Q

Serial interface refers to the number of parallel wires an interface uses.

A

F

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9
Q

The chief disadvantage of parallel interface is an increased delay.

A

F

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10
Q

What is self-clocking?

A

A mechanism in which signals sent across an interface contain information that allows the receiver to determine exactly how the sender encoded the data.

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11
Q

What is the chief advantage of serial interface?

A

Few wires.

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12
Q

What two methods accommodate bidirectional transfer?

A

Full-duplex and half-duplex interaction.

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13
Q

Each integrated circuit has a variable number of pins that provide external connections.

A

F

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14
Q

Throughput is usually measured in megabytes er second.

A

F

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15
Q

What do multiplexor and demultiplexors describe.

A

Hardware that handles data multiplexing.

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16
Q

What is the difference between latency and throughput?

A

Latency is the delay between when a bit is sent and the bit is received. Throughput is the number of bits that can be transferred per unit time.

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17
Q

Which interface offers more performance than any other cominbation?

A

Full-duplex, parallel interface.

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18
Q

Multiplexing is used to construct an I/O interface that can transfer arbitrary amounts of data over a fixed number of parallel wires.

A

T

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19
Q

What does multiplexing do?

A

Construct an I/O interface that can transfer arbitrary amounts of data over a fixed number of parallel wires.

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20
Q

A processor does not access external devices directly.

A

T

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21
Q

How does a processor access external devices?

A

It uses a programming interface to pass requests to an inteface controller.

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22
Q

A memory bus is intended to disconnect a processor with a memory system.

A

F

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23
Q

What is a bus?

A

A digital communication mechanism that allows two or more functional units to transfer control signals or data.

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24
Q

A standardized bus, means the specifications are available.

A

T

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25
Q

The notion of bus is not broad enough to encompass most external connections.

A

T

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26
Q

What does the term proprietary mean?

A

The design is owned by a private company and not available for use by other companies.

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27
Q

All computer systems contain only one bus.

A

F

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28
Q

Most buses are shared.

A

T

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29
Q

The most straight forward busses are classified as what?

A

Passive.

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30
Q

What does it mean for a bus to be shared?

A

A single bus is used to connect the procesor to a set of I/O devices.

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31
Q

What is an internal bus?

A

A bus that is not visible to the computer’s owner.

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32
Q

Attaching a device to a bus is nontrivial.

A

T

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33
Q

What does a bus use to determine when a given device can use the bus?

A

Access protocol

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34
Q

What are the wires that comprise a bus called?

A

Lines.

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35
Q

A bus only supports fetch and store operations

A

F

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36
Q

Buses do not use the fetch-store paradign.

A

F

37
Q

What techniques is especially helpful in reducing the number of lines in a bus?

A

multiplexing.

38
Q

Address and data values are multiplexed over a processor.

A

F

39
Q

Addresses and data values are multiplexed over a bus.

A

T

40
Q

Although an interface receives all requests that pass across the bus, the interface only responds to requests that contain an address for which the interface has been configured.

A

T

41
Q

To avoid memory configuration problems, architects can place memory on small circuit boards that each plug into a socket on the bus interface.

A

F

42
Q

What do most bus protocols use to detect an unassigned address?

A

A timeout mechanism

43
Q

What is a buss address conflict?

A

A bus error that results when interfaces are misconfigured so they respond to the same address.

44
Q

What is an unassigned address bus error?

A

A processor attempts to access an address that has not been configured into any interface.

45
Q

What is the main goal of a bus?

A

???

46
Q

Although the bus operations are named fetch and store, a device interface is not a memory.

A

T

47
Q

What does it mean for an address to be asymmetric?

A

If it defines fetch, but not store, or vice versa.

48
Q

We call the specification for a bus an address map.

A

T

49
Q

What is an address map?

A

Part of the specifications for a bus.

50
Q

When an address space is not contiguous it is said to have gaps in the address space.

A

F (holes)

51
Q

Unlike a conventional device a bridge does not answer requests directly.

A

T

52
Q

What is one of the two advantages of using a bridge?

A

Lower cost.

53
Q

What is a bridge?

A

A hardware device that interconnects two buses and maps address between them.

54
Q

The goal of using a bridge is to make the memory addresses mirror the two underlying buses?

A

???

55
Q

What is one disadvantage of abus?

A

Bus hardware can only perform one transfer at a time.

56
Q

What is switching fabrics?

A

Technology that permits multiple transfers to occur simultaneously.

57
Q

Each bus never provides a protocol that attached devices use to access the bus.

A

F

58
Q

The basic mechanisms of I/O are difficult to specify.

A

F

59
Q

The earliest computers took a straightforward approach to I/O.

A

T

60
Q

To prevent problems with synchronization, programmed I/O relies on what?

A

Synchronization

61
Q

Polling is the basic form of synchronization that a processor uses with an IO device.

A

T

62
Q

What do you call thebasic form of sychronization that a processor uses with an I.O device?

A

Polling

63
Q

What does a polling processor require?

A

The processor to repeatedly ask the device whether an operation has completed before the processor starts the next operation.

64
Q

Control and Status Registers refer to the set of busses a device uses.

A

F

65
Q

The chief advantage of a programmed I/O architecture arises from the economic benefit.

A

T

66
Q

What does a control register correspond to?

A

A contiguous set of addresses.

67
Q

What does the term Control and Status Registers refer to?

A

The set of addresses that a device uses.

68
Q

The central premise of interrupt-driven I/O is instead of wasting time polling a processors should be performing other operations while the I/O device is working.

A

T

69
Q

What is one approach that emerged as a superior way to the mismatch between I/O and processor speeds?

A

Interrupts.

70
Q

A bus must support two -way communication.

A

T

71
Q

An interrupt permanently borrows the processor to handle an I/O device.

A

F

72
Q

Polling uses an asynchronous style of programming. Interrupts use a synchronous style of programming.

A

F

73
Q

What happens when an interrupt occurs?

A

The hardware saves the state of the computation and restarts the computation when interrupt processing finishes.

74
Q

how many steps are there to handling an interrupt?

A

Five.

75
Q

To handle an interrupt a processor takes five steps. Name one of the steps.

A

Save the current execution state.

76
Q

A computer can have many devices, including multiple copies of the same type of device.

A

T

77
Q

What upgrade in processors design has enabled the processor to be programmed to respond to the most important process first?

A

???

78
Q

A processor that has interrupt priority levels can only have one device assigned any given interrupt priority level.

A

T

79
Q

When operating a priority level K, a processor can be interrupted by a device that has been assigned any level K.

A

F

80
Q

What is manual interrupt assignment?

A

A person configures both the hardware and software.

81
Q

What is one of the two ways interrupt assignments are made?

A

Fixed, manual assignment used on small, embedded system.s

82
Q

What kind of computers are Automated Assignments used on?

A

General-purpose computer, such as a PC.

83
Q

Architects refer to devices that can operate with direct help from the processor as smart devices.

A

F

84
Q

Direct Memory Access (DMA) allows a smart I/O device to access memory directly.

A

T

85
Q

What is a soft error?

A

The processor must retry the operation to determine whether an error was temporary or permanent.

86
Q

The technology used to start a new operation without delay is known as operation chaining.

A

T

87
Q

What term is used to capture the idea of diving a large block of incoming data into multiple small buffers?

A

scatter read

88
Q

What are input and output devices.

A

Ways to connect computers to external devices.

Comp. Org. Arch. (2 decks)

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