Exam 2 - Chapter 7

Question 1

CPU & Memory Are?

Answer 1

CPU requires memory access for every instruction

Question 2

CPU: Major Components

Answer 2

ALU (arithmetic logic unit)

CU (control unit)

Question 3

CPU - ALU (arithmetic logic unit)

Answer 3

Performs calculations and comparisons

Question 4

CPU - CU (control unit)

Answer 4

Performs Fetch/Execute cycle - flag conditions

Question 5

CPU: Sub Components

Answer 5

Memory Management Unit

I/O Interface

Question 6

CPU Sub Component: Bus Interface Unit

Answer 6

Memory Management Unit & I/O Interface combined

Question 7

CPU - FLAGS

Answer 7

Arithmetic carry & overflow - power failure - internal comp error - can be grouped into status registers

Question 8

BUS

Answer 8

Bridge between Memory & CPU

physical connection to trans data from one comp sys to another

Question 9

Bus signals or types

Answer 9

4 kinds: data - addressing - control signals - power (sometimes)

Question 10

Bus (dedicated)

Answer 10

Internal to CPU and do not interface with outside world

Question 11

Bus (general)

Answer 11

PCI express - USB - IDE - SATA

Question 12

Line

Answer 12

Each conductor in the bus

Question 13

Bus Categories

Answer 13

Parallel - serial

Question 14

Transmission directions

Answer 14

Simplex - Half Duplex - Full Duplex

Question 15

Simplex

Answer 15

unidirectional

Question 16

Half Duplex

Answer 16

bidirectional - one direction at a time

Question 17

Full Duplex

Answer 17

bidirectional simultaneously

Question 18

Bus Connections

Answer 18

Point-to-Point (single source to single destination)

Multipoint (multiple points connected) aka broadcast bus or multidrop bus

Question 19

Parallel

Answer 19

high throughput - all bits of word are trans simultaneously
Expensive & space hog
affected by radio-generated electrical interference
used for short distances ie CPU busses and motherboards

Question 20

Serial

Answer 20

1 bit transmitted at a time
single data line pair
few control lines
can be higher throughput than parallel due to non interference

Question 21

Point to Point

Answer 21

USB port to printer - CU to ALU

Question 22

Multipoint Broadcast BUS Ethernet

Answer 22

Multiple computers - network printer - network storage

Question 23

Multipoint bus

Answer 23

CPU - Memory - Disk Controller - Video Controller

Question 24

Registers

Answer 24

Single permanent storage location within the CPU used for a particular defined purpose.

Question 25

Use of Registers

Answer 25

Scratchpad for currently executing program- Holds data needed quickly or frequently Stores information about status of CPU and currently executing program- Address of next program instruction -Signals from external devices - i/o - cds - vid card etc.

Question 26

General Purpose Register

Answer 26

User- or program-visible registers Hold intermediate results or data values - e.g. - loop counters Equivalent to LMC?s calculator Typically several dozen in current CPUs

Question 27

MDR Register

Answer 27

Data - no instructions | A memory buffer register.

Question 28

Status Register

Answer 28

Status of CPU & currently executing program Flags (one bit Boolean variable) to track conditions like arithmetic carry and overflow - power failure - internal computer error

Question 29

MAR Register

Answer 29

have/holds address of memory location w/data or instruction

Question 30

IR Register

Answer 30

Stores instruction fetched from memory - the instruction currently being executed by comp

Question 31

Program Counter Register

Answer 31

AKA instruction pointer (IP) | Holds the address of the current instruction being executed.

Question 32

Accumulator

Answer 32

is equivalent to the calculator in lmc. Cpus provide several accumulators in a general purpose register88

Question 33

Memory Location

Answer 33

Unique addressing ie mail boxes in LMC

Question 34

Memory Operation

Answer 34

MAR gets address from instruction CPU decides store or retrieval Transfer between MDR & Memory MDR is a two way register

Question 35

RAM

Answer 35

Random Access Memory

Question 36

DRAM (Dynamic RAM)

Answer 36

Volatile - common - cheap - must be refreshed 1000's X each second

Question 37

SRAM (Static RAM)

Answer 37

Volatile - faster - more expensive - small amounts used in cache memory

Question 38

Cache Memory

Answer 38

static ram memory that is used for high speed access

Question 39

ROM

Answer 39

Read Only Memory - NON-Volatile - holds firmware software ie bios

Question 40

Flash Memory

Answer 40

NON-Volatile - secondary storage - portable - slower rewrite

Question 41

Fetch-Execute Cycle

Answer 41

2-cycle process since both instructions & data are in memory

Question 42

Fetch

Answer 42

Decode or find instruction - load from memory into register & signal ALU

Question 43

Execute

Answer 43

Performs operation that instruction requires - move/transform data

Question 44

Cycle - Load

Answer 44

``` Transfer address PC to MAR Transfer instruction MDR to IR Load instruction IR (address) to MAR Data copied to accumulator MDR to A Program Counter incremented PC + 1 = PC ```

Question 45

Cycle - Store

Answer 45

``` Transfer address PC to MAR Transfer instruction MDR to IR Load instruction IR (address) to MAR Accumulator copies data into MDR. A to MDR Program Counter incremented PC + 1 = PC ```

Question 46

Cycle - Add

Answer 46

``` Transfer address PC to MAR Transfer instruction MDR to IR Load instruction IR (address) to MAR MDR contents added to accumulartor contents. A + MDR to A Program Counter incremented PC + 1 = PC ```

Question 47

Instruction Classifications

Answer 47

Data Movement (load - Store) Arithmetic (+ - * /) Boolean (T/F - Y/N) Single operand (++ --)

Question 48

Priviledged Instruction

Answer 48

``` Operating Instructions HALT I/O Mem Mgmt Encryption & Decryption Sys Admin ```

Question 49

App level Instructions

Answer 49

aka user acessible instructions

Question 50

User Space

Answer 50

programs that execute w/o priviledges execute in user space

Question 51

OPCODE

Answer 51

Task

Question 52

Source OPERAND

Answer 52

Addresses

Question 53

Result OPERAND

Answer 53

Addresses - location of data - explicit (included in instruction) - implicit default assumed.