Embedded Flashcards

1
Q

What is a bootloader?

A

A program that runs before main application code. It initializes hardware, sets up memory, and loads application from storage into RAM

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2
Q

What’s the difference between C and Embedded C?

A

C is hardware independent and Embedded C is hardware dependent. A specific compiler is needed to compile embedded C for a specific uc.

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3
Q

What is a compiler? What does it output?

A

Compilers transform source code from a programming language a machine readable binary format

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4
Q

What is a watchdog timer?

A

A watchdog timer is a device that monitors uC programs to see if they are still operating. The WDT communicates with the uC at set interval. If the uC doesn’t output a signal or outputs too many signals the timer determines that the uC is malfunctioning. Windowed mode WDT detects both no signal and too many signals (which is a more robust fault checking method than Timed mode)

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5
Q

List various timers in embedded systems

A

WDT, General Purpose Timer, Interval Timer, SysTick Timer, RTC

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6
Q

What are pull-up and pull-down resistors? What are some considerations to take into account when sizing them?

A

Pullup/down resistors are used to ensure that a GPIO pin is not floating when it is not in use. High resistor values can cause slow rise-time in the GPIO pin (RC circuit with wire capacitance), too low resistors can allow current leaking and waste power

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7
Q

What is an ISR?

A

As ISR is an interrupt service routine. The procedures stored at a specific memory address are called when a specific interrupt occurs. ISRs return nothing and do not allow passing parameters.

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8
Q

Where are constant variables stored in memory?

A

data segment typically

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9
Q

What is the role of an Interrupt Vector Table in Interrupt Processing?

A

It contains the addresses of ISRs. Each entry corresponds to a specific interrupt and the address of the ISR in memory.

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10
Q

What’s the difference between a Process and a Thread?

A

Threads share address space and processes don’t. Processes are heavyweight and require significant overhead, threads are lightweight and don’t. Threads can communicate via shared variables, mutexes, semaphores, condition variables.

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11
Q

What are the 4 levels of testing in Embedded Systems?

A

Unit, Integration, System, Acceptance

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12
Q

Big vs Little Endian?

A

Big endian stores MSB at the smallest memory address. Little endian stores LSB at the largest memory address. Bit order internal to the bytes is not affected.

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13
Q

RS232 vs RS485?

A

Both serial. 232 is point-to-point over short distances. It uses a single data line. 485 is multipoint over longer distances and in noisy environments. It uses differential signaling.

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14
Q

What is a Semaphore? How is it different from a Mutex?

A

Mutex ensures only one thread can access a shared resource at a time. They are binary semphores. Semaphores have multiple states (represented by a counter) unlike mutexes which can be locked or unlocked. Semaphores can control access to a pool of resources or limit concurrent accesses.

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15
Q

Difference between Macro and Inline Fucntion?

A

Macros take more space (copy code wherever macro exists) but execute faster. They are expanded by preprocessor. Inline functions are slower but take up less space. Inline funcions have compile-time error checking unlike macros

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16
Q

What is the size of a pointer?

A

4 bytes on 32-bit system, 8 bytes on 64 bit

17
Q

What causes a segmentation fault?

A

A segmentation fault is a runtime error which can be caused by using a dereferenced pointer, attempt to access read-only memory, attempt to free memory that is already freed, stack overflow

18
Q

Can a variable be both volatile and const?

A

Yes. They can be used together for GPIO purposes. The value can be changed by external factors (eg the pin). The volatile keyword indicates to the compiler that the variable’s value may change unexpectedly due to factos not in the code. This prevents the compiler from using optimizations that rely on the value not changing. The const in this case would indicate that the variables address stays constant

19
Q

What is a Null pointer?

A

Null pointers do not point to a valid location in memory, instead they point to Null which can be used by the programmer to detect whether a pointer is valid or not.

20
Q

What is RISC vs CISC?

A

Reduced Instruction Set Computer, Complex Instruction Set Computer. RISC has no memory unit, is faster, simple decoding.

21
Q

What is a dangling pointer?

A

A dangling pointer is a pointer that points to memory that has already been freed and is no longer in use. Accessing data via the pointer would cause undefined behavior.

22
Q

What is a function pointer?

A

A function pointer points to the address of a function in memory. It can be used to invoke the function. This can be useful for passing different functions as arguments such as in the Strategy pattern

23
Q

What is Volatile in C?

A

It stops specific compiler optimizations for a variable. It tells the compiler that the variable can be changed outside of the code, e.g. via a GPIO pin

24
Q

What is a stack overflow?

A

A stack overflow is a runtime error that occurs when a program tries to access memory beyond its available maximum limit.

25
Q

What is interrupt latency?

A

Interrupt Latency is the number of clock cycles the processor takes to respond to an interrupt request

26
Q

Static variable in C

A

Static variables preserve their value even after going out of scope. It’s scope is local but it continues to live until the end of the program. Typically used as a counter. They are allocated in the data segment, not the stack segment.

27
Q

What is flash memory? What are some potential issues?

A

Flash memory is non-volatile memory that is electrically eraseable and reprogrammable. It can wear out due to continuous reprogramming. Wear-leveling is used to avoid this.

28
Q

Describe SPI

A

Serial Peripheral Interface is used a synchronous comm protocol for high-speed data exchanges. It uses a master-slave paradigm with at least 4 signals, SLCK, MOSI, MISO, SS. SLCK, MOSI, MISO are shared by all devices on the bus while each slave has its own SS line. The master pulls a specific SS line low to select a device for comms. Speeds of 100Mhz achievable, idealy for data streaming.

29
Q

Describe I2C

A

I2C is a synchronous (uses clock) multi-master, multi-slave with 2 wires (SDA, SCL), each slave device must have a unique address. Each message includes slave address, data frames, start / stop bits, read / write and ACK / NACK. Max speed 5Mbps

30
Q

Advantages / Disadvantages between SPI and I2C

A

SPI is faster but uses an SS pin for each device on the bus. I2C is slower but uses only 2 wires no matter how many peripherals on bus.

31
Q

Describe UART

A

Universal Asynchronous Receiver / Transmitter is used for direct serial communication between two components. It uses two data wires Tx and Rx. A UART packet consists of start bit, data frame, parity bit, and stop bits. No clock signal needed, but both devices needed to be on the same baud.

32
Q

What are Parity bits?

A

A Parity bit is a basic error checking method. The value of the parity bit is selected such that the told number of 1s in the data packet is even or odd.

33
Q

What are CRC checks?

A

Cyclic Redundancy Checks are more robust error checkers. The transmitter of a packet applies a polynomial operation on its data and sends the result along with the packet. The receiver then applies the same operation to the packet and confirms whether or not the CRC value matches what it computed.

34
Q

What is the memory model employed in embedded systems?

A

Code Segment - ROM for storing code
Data Segment - Stores initialized global and static variables
Stack Segment - Stores all local variables
Heap Segment - All dynamic allocations stored here
Block Started By Symbol Segment - Unitialized global and static variables

Each segment has a write-protected region

35
Q

What are registers?

A

Small fast memory located in the CPU. They are used for storing temporary data, CPU status flags, and control information

36
Q

What is memory mapped I/O?

A

MMIO allows peripherals and external devices to be accessed using memory read / write operations. Peripheral device registers are mapped to memory addresses, allowing the CPU to communicate with them using standard memory access instructions instead of using polling or programmed I/O.