Brainscape's Knowledge GenomeTM

Browse over 1 million classes created by top students, professors, publishers, and experts.


See full index

ECET 490 Entire Course New > ECT 114 Entire Course New > Flashcards

ECT 114 Entire Course New Flashcards

1
Q

ECT 114 Week 1 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-1-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 1 iLab New

  1. Using QUARTUS II software, open a new Block Diagram/Schematic file. Enter the logic gate symbols representing the following gates. Connect and label input and output pins. Label the inputs as A, B, C… and label the output as Z. Paste the schematics into this iLab. (14 points)
  2. Using QUARTUS II software, open a Block Diagram/Schematic file. Insert the logic gate symbol for the following Boolean expressions. Connect and label input and output pins. Paste the schematics into this iLab. (20 points)
  3. Analyze the switch logic circuit in Figure 1. The light ON is considered a logic HIGH, and the light OFF is considered a logic LOW.
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-1-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
2
Q

ECT 114 Week 2 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-2-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 2 iLab New

  1. (1 point) Which is the preferred environmental condition for handling electronic components that are ESD sensitive?
  2. (1 point) What does ESD stand for?
  3. (1 point) List three common means for generating static electricity
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-2-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
3
Q

ECT 114 Week 2 Quiz New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-2-quiz-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 2 Quiz New

  1. (TCO 1) Determine the correct Boolean expression for the gate below
  2. (TCO 1) Determine the correct Boolean expression for the gate below.
  3. (TCO 1) Determine the correct Boolean expression for the gate below.
  4. (TCO 1) Determine the correct Boolean expression for the gate below.
  5. (TCO 1) Determine the correct Boolean expression for the gate below.
  6. (TCO 1) Determine the correct VHDL assignment statement for the gate below.
  7. (TCO 1) Determine the correct VHDL assignment statement for the gate below.
  8. (TCO 1) Determine the correct VHDL assignment statement for the gate below.
  9. (TCO 1) Determine the correct VHDL assignment statement for the gate below.
  10. (TCO 1) Determine the correct VHDL assignment statement for the gate below.
  11. (TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows.
  12. (TCO 2) Determine logic level (HIGH/LOW) on input A at time period T1 and T2 in order for the output of the given logic gate to be as follows.
  13. (TCO 2) What is the analog specification VOH?
  14. (TCO 2) A TTL device has the following specifications.

Maximum VIL = .8 V, minimum VIH = 2 V

An input is measured to be 1.2 V. How will the device interpret that voltage?

  1. (TCO 2) A CMOS device has the following specifications.

Maximum VIL = 1.67 V, minimum VIH = 3.33 V

An input is measured to be 2 V. How will the device interpret that voltage? (Points : 1)

  1. (TCO 2) Determine the value for minimum VOH of the standard 7400 TTL Series. (Points : 1)
  2. (TCO 2) Determine the value for maximum VIL of the standard 4000B Series CMOS. (Points : 1)
  3. (TCO 1) OUTPUT is equal to CLOCK when ENABLE is _____.
  4. (TCO 1) OUTPUT is equal to when ENABLE is
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-2-quiz-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
4
Q

ECT 114 Week 3 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-3-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 3 iLab New

ECT 114 ECT/114 ECT 114 Week 3 iLab.

A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-3-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
5
Q

ECT 114 Week 4 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-4-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 4 iLab New

  1. Explain the operation of an encoder. (1 point) _It is a device that converts a weighted numeric input line to an equivalent digital code.
  2. What does it mean when an encoder is a priority encoder? (1 point) _Logic establishes a rank order for inputs and always accepts the higher of multiple inputs.
  3. Describe one practical application that uses encoder. (1 point) _A TV remote control or a 10key keypad.
  4. Explain the operation of a decoder. (1 point) _It is a device that converts a digital code into a single output representing its numeric value.
  5. Describe one practical application that uses a decoder. (1 point) _It is used in computers to handle operations with memory, or used to drive 7 segment displays, or used in applications that require the outputs to be in decimal form, such as calculators.
  6. Search through datasheets for the 74148 device to find an application note that shows how to cascade two 74148 encoders to create one 16-to-4 line priority encoder. Draw the schematic for the 16-to-4 line priority encoder. (8 points)
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-4-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
6
Q

ECT 114 Week 5 Homework Quiz New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-homework-quiz-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 5 Homework Quiz New

  1. (TCO 5) Download the datasheet fromwww.ti.com for the 74LS151. Which device type has the lowest typical power dissipation? (Points : 1)
  2. (TCO 5) View a datasheet function table for a 74151 device. Using Quartus pin names, assume the chip is enabled and C = 1, B = 0, and A = 0. Which data input appears on output Y? (Points : 1)
  3. (TCO 5) View a datasheet function table for a 74151 device. Which are the select input pin names, and which is the active level of the select input pins?(Points : 1)
  4. (TCO 5) View a datasheet function table for a 74151 device. Data are applied to D4, the device is enabled, and the select lines are set to select D4. Which output will have an inverted version of D4?(Points : 1)
  5. (TCO 5) View a datasheet function table for a 74151 device. The inputs to the 74151 are C = 1, B = 0, A = 0, D7 = 0, D6 = 0, D5 = 1, D4 = 1, D3 = 1, D2 = 1, D1 = 0, D0 = 1, and GN = 0. Which is the value of Y and why? (Points : 1)
  6. (TCO 5) The waveforms below are for a 74151 with Quartus pin names. From 1.6 us to 2.4 us, which is the value of Y and why?
  7. (TCO 5) The waveforms below are for a 74151 with Quartus pin names. From 3.2 us to 4.0 us, which is the value of Y and why?
  8. (TCO 5) Download the datasheet from www.ti.com for the SN74LS151 and find the electrical characteristics. Find the values for VIL and VIH. A voltage of 2.4 V is one of the inputs to the 74LS151. How will the 74LS151 interpret that voltage? (Points : 2)
  9. (TCO 5) View a datasheet function table for a 74138 device, which can be configured as a demultiplexer. Using Quartus pin names, assume the chip is enabled, the data input is connected to G2AN, C = 0, B = 1, and A = 1. Which output has the data? (Points : 1)
  10. (TCO 5) Download the datasheet from www.ti.com for the 74LS138. What is the minimum operating temperature for the SN74LS138? (Points : 1)
  11. (TCO 5) Download the datasheet from www.ti.com for the 74LS138. G2AN is 0 and G1 is 1. Data is applied to G2BN. CBA is 000. Which signal should be observed on Y0N? (Points : 1)
  12. (TCO 5) Download the datasheet from www.ti.com for the SN74LS138 and find the electrical characteristics. Find the values for VIL and VIH. A voltage of 1.1 V is one of the inputs to the 74LS138. How will the 74LS138 interpret that voltage? (Points : 2)
  13. (TCO 5) Download the datasheet from www.ti.com for the 74LS138. Match the Quartus input/output pin names on the left with the pin numbers on the right.
    (Points : 3)
  14. (TCO 5) Download the datasheet from www.ti.com for the 74LS151. Match the Quartus input/output pin names on the left with the pin numbers on the right.
    (Points : 3)
  15. (TCO 5) Match the waveforms labeled as OUTPUTx to the appropriate pin on the 74138. Data is applied to G2BN.
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-homework-quiz-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
7
Q

ECT 114 Week 5 iLab 5 New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-ilab-5-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 5 iLab 5 New

ECT 114 ECT\114 ECT 114 Week 5 iLab 5.

A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-ilab-5-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
8
Q

ECT 114 Week 5 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 5 iLab New

Problems:

  1. efly explain the operation of a multiplexer
  2. Describe one practical application that uses a multiplexer.
  3. Briefly explain the operation of a demultiplexer. (1 point
  4. Describe one practical application that uses a demultiplexer. (1 point
  5. Complete the following timing diagram based on the data sheet for the 74151 multiplexer. (10 points)
  6. Interpret the datasheet for the 74138 demultiplexer and complete the following timing diagram. (9 points)
  7. Download and unzip the Quartus programming file entitled “multiplexer” to the folder c:\ECT 114 \week5 on your computer. The file is located in the “Doc Sharing (Week 5 Lab Files)” directory in eCollege. Note: You will not be able to recompile this project because you are only given the programming (.sof) file. The steps to programming a file are included in the Week 3 Lecture. Program the faulty 74151 multiplexer into the FPGA on your eSOC board. As you control the multiplexer inputs with switches, complete the following function table. If the LED is on, that corresponds to logic high. Off corresponds to a logic low. In order to see which input connects to the Y output, you will need to toggle the data switches one at a time. (10 points)
  8. Compare the results of your table from the eSOC multiplexer to a data sheet and identify what line(s) are incorrect. (5 points)
  9. Download and unzip the Quartus programming file entitled “demultiplexer” to the folder c:\ECT 114 \week5 on your computer. The file is located in the “Doc Sharing (Week 5 Lab Files)” directory in eCollege. Note: You will not be able to recompile this project because you are only given the programming (.sof) file. Program the faulty 74138 demultiplexer into the FPGA on your eSOC board. As you control the demultiplexer inputs with switches, complete the following function table. If the LED is on, that corresponds to logic high. The circuit programmed is identical to the circuit in problem 6. (10 points)
  10. Compare the results of your table from the eSOC demultiplexer to that of the data sheet and identify what line(s) are incorrect. (5 points)
  11. Open the Quartus II software and create a new project calledW5iLabmux. Using the VHDL editor, create a mutliplexer (shown below) based on the IF – THEN – ELSE statement. A note of caution is that some text editors add the smart quotes. Quartus will not recognize those quotes and you may get an error in your program. (6 points)
  12. Open the Quartus II software and create a new project calledW5iLabdemux. Using the VHDL editor, create a demultiplexer based on the IF – THEN – ELSE statement. (6 points)
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
9
Q

ECT 114 Week 5 Quiz New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-quiz

For more classes visit
www.assignmentcloud.com
ECT 114 Week 5 Quiz New

  1. (TCO 5) View a datasheet function table for a 74151 device. Which are the select input pin names, and which is the active level of the select input pins?
  2. (TCO 5) View a datasheet function table for a 74151 device. Data are applied to D4, the device is enabled, and the select lines are set to select D4. Which output will have an inverted version of D4?
  3. (TCO 5) View a datasheet function table for a 74151 device. The inputs to the 74151 are C = 1, B = 0, A = 0, D7 = 0, D6 = 0, D5 = 1, D4 = 1, D3 = 1, D2 = 1, D1 = 0, D0 = 1, and GN = 0. Which is the value of Y and why?
  4. (TCO 5) The waveforms below are for a 74151 with Quartus pin names. From 1.6 us to 2.4 us, which is the value of Y and why?
  5. (TCO 5) The waveforms below are for a 74151 with Quartus pin names. From 3.2 us to 4.0 us, which is the value of Y and why?
  6. (TCO 5) Download the datasheet from www.ti.com for the 74LS138. What is the minimum operating temperature for the SN74LS138?
  7. (TCO 5) Download the datasheet from www.ti.com for the SN74LS138 and find the electrical characteristics. Find the values for VIL and VIH. A voltage of 1.1 V is one of the inputs to the 74LS138. How will the 74LS138 interpret that voltage?
  8. (TCO 5) Download the datasheet from www.ti.com for the 74LS138. Match the Quartus input/output pin names on the left with the pin numbers on the right.
  9. (TCO 5) Download the datasheet from www.ti.com for the 74LS151. Match the Quartus input/output pin names on the left with the pin numbers on the right.
  10. (TCO 5) Match the waveforms labeled as OUTPUTx to the appropriate pin on the 74138. Data is applied to G2BN.
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-5-quiz

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
10
Q

ECT 114 Week 6 iLab 6 New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-6-ilab-6-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 6 iLab 6 New

ECT 114 ECT\114 ECT 114 Week 6 iLab 6

A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-6-ilab-6-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
11
Q

ECT 114 Week 6 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-6-ilab-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 6 iLab New

  1. Describe one practical application that uses an adder. (2 points) ___________A computer’s CPU._______________________
  2. What is a major advantage of using two’s complement subtraction? (2 points)_______The 2’s complement allows hardware to subtract numbers by adding them.___________
  3. Create the adder/subtractor circuit below using a 7483. (6 points)
  4. From the circuit in problem 3, determine the proper output signals for S and CarryOut in the area provided in the figure below. (8 points)
  5. Open the Quartus II software and create a new project calledW6iLab. Using the VHDL editor, create an addersub symbol based on the following code.
  6. Create a Block Diagram/Schematic file, insert the VHDL symbol created from the addersub file, and then create and simulate waveforms to verify the code functions as an adder and subtractor. The input waveforms should be similar to what is shown below. A, B, and R should all be set up as hexadecimal values (right click on the signal name in the waveforms, go to the properties, and set the radix to hexadecimal). Paste the completed waveform into your lab. (10 points)
  7. Examine the adder circuit with the measurements below. Examine the inputs and outputs as written on the schematic and determine faults on the gates and/or adder. Your response must be specific (example: XOR gate #4 has the incorrect output, or Pin C4 of the 7483 has the incorrect output). There are, at most, two errors in the circuit. (5 points)
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-6-ilab-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
12
Q

ECT 114 Week 7 iLab 7 New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-7-ilab-7-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 7 iLab 7 New

ECT 114 ECT\114 ECT 114 Week 7 iLab 7

A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-7-ilab-7-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
13
Q

ECT 114 Week 7 iLab New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/14

For more classes visit
www.assignmentcloud.com
ECT 114 Week 7 iLab New

  1. Open the Quartus II software and create a new project called flip-flop. Using the Block Diagram/Schematic editor, create the diagram shown below. (10 points)
  2. Compile and simulate the operation for the D flip-flop according to the following timing diagram. (15 points)
  3. Open the Quartus II software and create a new project calledJKFlipFlop. Using the Block Diagram/Schematic editor, create the diagram shown below. (10 points)
  4. Zip your entire project directory and submit the zipped file with your iLab. (5 points)
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/14

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly
14
Q

ECT 114 Week 7 Quiz New

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-7-quiz-new

For more classes visit
www.assignmentcloud.com
ECT 114 Week 7 Quiz New

  1. (TCO 7) Predict the correct output for Q on the D flip-flop with the flip-flop as a rising edge triggered device.
  2. (TCO 7) Predict the correct output for Q on the D flip-flop with the flip-flop as a rising edge triggered device
  3. (TCO 7) Predict the correct output for Q on the D flip-flop with the flip-flop as a falling edge triggered device
  4. (TCO 7) Examine the waveforms below and determine where the fault is in the flip-flop output waveform. The flip-flop is triggered by a rising edge
  5. (TCO 7) Predict the correct output for Q on the JK flip-flop with the flip-flop as a rising edge triggered device
  6. (TCO 7) Predict the correct output for Q on the JK flip-flop with the flip-flop as a rising edge triggered device
  7. (TCO 7) Predict the correct output for Q on the JK flip-flop with the flip-flop as a falling edge triggered device.
  8. (TCO 7) Examine the waveforms below and determine where the fault is in the flip-flop output waveform. The flip-flop is triggered by a rising edge
A

Check this A+ tutorial guideline at

https://www.assignmentcloud.com/ect-114-devry/ect-114-week-7-quiz-new

For more classes visit
www.assignmentcloud.com

How well did you know this?
1
Not at all
2
3
4
5
Perfectly

ECET 490 Entire Course New (10 decks)

Brainscape helps you reach your goals faster, through stronger study habits.
© 2024 Bold Learning Solutions. Terms and Conditions