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Electrical > Digital Electronics > Flashcards

Digital Electronics Flashcards

1
Q

Analogue signals take…

A

Continuous values

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2
Q

Digital signals take…

A

Restricted rages of amplitude

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3
Q

Binary signals are ____ signals that take only _ ____

A

Binary signlas are digital signlas that take only 2 ranges

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4
Q

What does an anolog and digital signal graph look like?

A
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5
Q

Why digital?

A

Reliability

  • Anologue circuits are more vulnerable to noise
  • Digital circuits can tolerate some levels of noise
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6
Q

Base 2 means?

A

We can only use 0 and 1

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7
Q

How would you write 11010.1 in binary?

A
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8
Q

How do you convet decimal to binary?

A
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9
Q

The hexadecimal number system represents…

A

A larger range of values with one digit

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10
Q

Basic Boolean operations are…

A

AND, OR and NOT

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11
Q

If the variable doesn’t have the value 0, it must have…

A

The value 1 and vice versa

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12
Q

Symbols like ____ to represent Boolean ____

A

Symbols like A, B etc to represent Boolean variables

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13
Q

What do truth tables do?

A

Describe how a logic circuit (gate) outputs depend on it’s inputs

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14
Q

What sign is commenly used to represent an Or gate?

A

The plus sign (+)

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15
Q

What does an Or gate look like?

A
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16
Q

What gate produces an output of 1 whenever when all of the inputs are 1?

A

An Or gate

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17
Q

What does an And gate look like?

A
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18
Q

What is the Boolean expression for an Or gate?

A

z = x + y

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19
Q

What is the Boolean expression for an And gate?

A

z = x . y

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20
Q

What sign is used to commonly represent the And gate?

A

The period (dot) sign .

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21
Q

What gate produces an output of 1 only when all of the inputs are 1

A

An And gate

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22
Q

What is the symbol for a Not gate?

A
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23
Q

What is the Boolean expression for a Not gate?

A

z = ¬x

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24
Q

What sign is commonly used to represent a Not gate?

A

The ¬ sign is commonly used to represent not. Sometimes a bar over the variable is used also

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25
Q

A Not gate is a…?

A

Circuite that inversts - or negates - the input signal

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26
Q

What gate produces an output of 1 whenever the input is 0, and an ouput of 0 when the input is 1

A

A Not gate

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27
Q

What is the symbol for a Nand gate?

A
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28
Q

What is the Boolean expression for a Nand gate?

A

z = ¬ ( x . y )

Sometimes you will see this written in the notation that has a bar over the top

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29
Q

What gate produces an output of 1 only when any one of the inputs are 0?

A

A Nand gate

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30
Q

A Nand gate is…

A

the logical not of the output of an And gate

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31
Q

What is the symbol of a Nor gate?

A
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32
Q

What is the Boolean expression of a Nor gate?

A

z = ¬ ( x + y )

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33
Q

What gate has an output of 0 whenever any of the inputs are 1?

A

A Nor gate

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34
Q

A Nor gate is…

A

The logical not of the output of an Or gate

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35
Q

What is the symbol for an Xor gate?

A
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36
Q

What is the Boolean expression for an Xor gate?

A
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37
Q

Xor (____) gate

A

(Exclusive Or) gate

38
Q

Define Commutative laws

A

Talk about variabls interchanging

39
Q

Define Associative laws

A

Talk about bracketing variable groups

40
Q

Define Absorption laws

A

talk about variables absorbing others

41
Q

Define Distributive laws

A

talk about multiplying through groups

42
Q

Boolean products are ____ functions e.g….

A

AND functions e.g. A. ~B.C

43
Q

Boolean sums are ____ functions e.g….

A

OR functions e.g. A+~B+C

44
Q

Why are Minterms products?

A

Becuase they are the logical AND of a set of variables

45
Q

Why are Maxterms sums?

A

Becuase they are the logical OR of a set of variables

46
Q

What is a Karnaugh Map?

A

A diagram consisting of a rectangular array of squares each representing a different combination of the variables of a Boolean function

47
Q

What is looping?

A

Grouping squares in the map that contain 1

48
Q

You loop pairs that are…?

A

Above or beside each other

49
Q

K-maps reduce the…?

A

…cost of logic synthesis

50
Q

What cannot be define by a Boolean expression?

A

Incomplete specified functions

51
Q

What are “Don’t care” terms and what are they represented by?

A

Terms of functions that we don’t care about, corresponds to lines in the truth table where we don’t specify the output, represented by x

52
Q

Define propagation delay

A

A small time it takes to change state when the inputs change

53
Q

What are the two types of hazards in gate propagation delays?

A

Static Hazard and Dynamic Hazard

54
Q

Define static hazard

A

When the output undergoes a momentary transition when it is supposed to remain unchanged

55
Q

Define dynamic hazard

A

When the output changes more than once when it is supposed to change only once

56
Q

What do static and dynamic hazards look like?

A
57
Q

When are hazards a problem?

A

Hazards are always a problem if they occur in logic providing the input to a system with memory

58
Q

Nand and Nor are common because…?

A
  • They are simpler to build
  • They are “logically complete”
59
Q

When is a set of circuit gates logically complete?

A

A set of circuit gates is said to be logically complete if any boolean function representable by a truth table can be implemented using gates from only that set

60
Q

Logically complete sets include…

A
  • Sets containing AND, OR, INVERTER gates
  • Sets containing only NAND gates
  • Sets containing only NOR gates
61
Q

How do you implement circuits in NAND?

A
  • First obtain the function in simplest sums of products form
  • Invert the function twice (this leaves it unchanged)
  • Use de Morgans theorem on the lower inversion
  • The function can now be implemented using only NAND gates
62
Q

NAND is negation of…?

A

AND

63
Q

What is the condition for static hazard?

A

If two groups of 1’s on the K-map are adjacent and non-overlapping (horizontally or vertically) then changing a single input variable can move out of one group into another

64
Q

How do you elimate a static hazard?

A

By including extra groups that overlap the offending transitions

  • This adds in circuitry to protect the hazard
65
Q

What are combinational circuits?

A

Combinational circuits cannot remember a previous output value when an input value changes

66
Q

What are sequential circuits?

A

Sequential ciruits take into account (or remember) their previous state

67
Q

How is a sequential circuit synchronized?

A

By a clock signal that consists of periodic 1 pulses

68
Q

What does SoP stand for

A

Sums of products

69
Q

What does SR Flip-flop stand for?

A

Set/Reset Flip-slop

70
Q

What does a SR Flip-flop consist of?

A

Two NOR gates

71
Q

What happens when the S and the R are low?

A

The NOR gates act as inverters for the other input signal

72
Q

What happens when S becomes high and R is low?

A

¬Q is forced low and Q is high (set)

73
Q

When S returns low after being high in an SR Flip-flop, Q…?

A

Remins high (it is in the set state)

74
Q

What happens when R becomes high and S is low?

A

Q is forced low

75
Q

When R returns low after being high, what happens to Q?

A

Q remains low (the reset state)

76
Q

Are R and S normally allowd to be high at the same time?

A

No, so with R and S low, the flip-flop remembers whihch input was high most recently

77
Q

What can we achieve with a D type flip-flop?

A

Setsome data and stores it

78
Q

What is the cost of the function directly related too when it is synthesised using AND and OR?

A

The

  • Number of gates
  • Gate inputes
79
Q

A minimum SoP expression is one which has…?

A
  • A minimum number of gates
  • A minimum number of gate inputs
80
Q

Why is it helpful to represent K-maps in text form?

A
  • Helpful if we consider larger and larger maps, of more than 4 terms
  • And the underlying princioples that we are representing graphically
81
Q

How do you represent a K-map?

A

By simply recording the decimal equivalent of the high outputs

82
Q

When is a product an implicant?

A

When any 1, or group of 1’s that may be combined represent a product term

83
Q

When is an implicant prime?

A

An implicant is prime if it cannot be combined with another term to eliminate a variable

  • A single 1 is prime if it is not adjacent to any other 1
  • Two adjacent 1’s are prime if they are not contained in a group of 4
  • Four adjacent 1’s are prime if they are not contained in a group of 8
  • …etc…
84
Q

When can a SoP term not be minimal and why?

A

When it is containing a term which is not prime because if a non prime term is present the expression maybe further simplified

85
Q

In order to minimise…

A

we must find the minimal number of prime implicants needed to cover all 1s on a map

86
Q

A minimal solution…

A

Must include all essential prime implicants

87
Q

How do you find the minimal SoP expression?

A
  • First loop all essential prime implicants
  • For simple maps, this can be done by inspection
  • For maps of 5 variables or more, it needs a systematic approach – this is where our ∑ notation is useful
88
Q
A
89
Q

Define a static hazard

A

A circuit contains a static hazard where, when one input variable changes, the output may change more than once

90
Q

How is it possible to overcome static hazards?

A

By linking the adjacent groups to an additional group

Electrical (5 decks)

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