Defns

Question 1

library os

Answer 1

library of standard services

Question 2

multitasking os

Answer 2

can have multiple processes existing at once

Question 3

preemption

Answer 3

interrupt a running task

Question 4

memory protection

Answer 4

protect processes from one another

Question 5

multi user os

Answer 5

provides protection to serve distrustful users/buggy apps

Question 6

interposition/mediation

Answer 6

os tracks all the resources an app can use and checks legality on each access

Question 7

process

Answer 7

an instance of a running program

Question 8

io bound

Answer 8

time of task determined by waiting for io

Question 9

cpu bound

Answer 9

time of task determined by speed of processor

Question 10

concurrency

Answer 10

multiple programs running/appearing to run simultaneously

Question 11

parallelism

Answer 11

run two threads at the same time in multiple cores

Question 12

preemptive multitasking

Answer 12

rapidly switch between two threads on the same core

Question 13

process control block

Answer 13

struct os uses to track state of a process

Question 14

context switch

Answer 14

a transition between contexts

Question 15

thread

Answer 15

schedulable execution context

Question 16

limitations of kernel threads

Answer 16

slower thread operations
one-size fits all thread impl
heavy weight memory reqs

Question 17

limitations of user threads

Answer 17

cannot take advantage of multiple cores
blocking syscall blocks all threads
possible deadlock if one thread blocks all threads

Question 18

limitations of n:m threads

Answer 18

blocked threads, deadlock
hard to maximize parallelism
kernel doesn’t know relative importance of each thread

Question 19

caller-save

Answer 19

not preserved across subroutine calls
saved in switchframe

Question 20

callee-save

Answer 20

preserved across subroutine calls
saved in trapframe

Question 21

race condition

Answer 21

program result depends on order of execution

Question 22

cache coherence

Answer 22

all threads see the same value for a shared resource

Question 23

cache consistency

Answer 23

all threads receive updates in order

Question 24

seqcon

Answer 24

result of execution is as if the operations of each processor occurred in the order specified by the program

Question 25

write atomaticity

Answer 25

if any core reads the result of a write, all subsequent reads see the same result

Question 26

write-back caching

Answer 26

mark cache portion as dirty, write back when flushing

Question 27

write-through caching

Answer 27

write back immediately

Question 28

write-combining

Answer 28

store writes in a buffer and occur in a burst

Question 29

weak consistency

Answer 29

no guarantee that reads/writes have seqcon

Question 30

critical section

Answer 30

code that accesses a shared variable and must not be executed concurrently by >1 thread

Question 31

mutual exclusion

Answer 31

only one thread can be in a critsec at a time

Question 32

progress/liveness

Answer 32

if no thread is in a critsec and one wants to get in, it will eventually

Question 33

bounded waiting/fairness

Answer 33

once a thread starts waiting to enter a critsec, there is a limit to how long it waits

Question 34

lockset algorithm

Answer 34

for each shared resource keep a lockset; if the lockset is ever empty there is no mutex protecting it (catch potential races)

Question 35

amdahl’s law

Answer 35

T(n)= T(1)(B + 1/n(1 - B))

Question 36

scalable commutativity rule

Answer 36

whenever interface operations commute, they can be implemented in a way that scales

Question 37

coarse grained locking

Answer 37

one lock for a whole data structure, if it isn’t used that often

Question 38

fine grained locking

Answer 38

one lock for each element, maximizes concurrency for a structure used often

Question 39

contention

Answer 39

threads often waiting for a particular resource; often good to use fine grained locking

Question 40

spinlock

Answer 40

a lock that spins (repeatedly tests the lock’s availability in a loop until it is obtained)

Question 41

cache line states

Answer 41

modified, shared, invalid

Question 42

modified state

Answer 42

one cache has a valid (dirty copy), all other copies in other caches are stale (they must be invalidated before entering this state)

Question 43

shared state

Answer 43

one or more caches have a valid copy

Question 44

invalid state

Answer 44

doesn’t contain the data

Question 45

non-uniform memory access (NUMA)

Answer 45

processors can access their local memory faster than the memory of other processors

Question 46

deadlock

Answer 46

multiple threads waiting on each other, preventing progress

Question 47

deadlock conditions

Answer 47

1. limited access
2. no preemption of resources
3. hold and wait
4. circularity in graph of requests

Question 48

interrupt

Answer 48

signals generated by devices that need attention

Question 49

exception

Answer 49

conditions discovered by the processor while executing an instruction

Question 50

interrupt handler

Answer 50

a function in the kernel that services a device request

Question 51

non-maskable interrupt (NMI)

Answer 51

interrupts that cannot be disabled, for urgent requests (e.g. overheating)

Question 52

interrupt descriptor table (IDT)

Answer 52

defines the entry point for a particular interrupt vector

Question 53

x86 hardware interrupt handling process

Answer 53

RESTITS

Question 54

application binary interface (ABI)

Answer 54

defines the contract between an app’s functions and system calls (OSes and compilers must obey these rules - calling conventions)

Question 55

stack frame

Answer 55

contains all the saved registers and local variables that must be saved within a single function call

Question 56

execution context

Answer 56

the environment where functions execute, including their arguments, local vars, memory

Question 57

application context

Answer 57

application threads

Question 58

kernel context

Answer 58

kernel threads, software interrupts

Question 59

interrupt context

Answer 59

interrupt handler