DE 3.1 Flashcards
Type of counter in which each flip-flop output serves as the clock input signal for the next flip-flop in the chain.
Asynchronous Counter
Flip-flop inputs that can affect the operation of the flip-flop independent of the synchronous and clock inputs.
Asynchronous Inputs
Digital signal in the form of a rectangular pulse train or a square wave.
Clock
Type of flip-flop in which the D (data) input is the synchronous input.
Clocked D Flip-Flop
Type of flip-flop in which inputs J and K are the synchronous inputs.
Clocked J-K Flip-Flop
Circuit that contains a NAND gate latch and two steering NAND gates.
D Latch
Fraction of the total period that a digital waveform is in the HIGH state. DC = th/T (often expressed as a percentage: %DC = th/Tx100%).
Duty Cycle (DC)
Manner in which a flip-flop is activated by a signal transition. A flip-flop may be either a positive- or a negative-edge-triggered flip-flop.
Edge-Sensitive
The part of a pulse where the logic level is in transition from a HIGH to a LOW.
Falling Edge
A sequential circuit based on a latch whose output changes when its CLOCK input receives a pulse.
Flip-Flop
The number of cycles per unit time of a periodic waveform.
Frequency
Enabled by a logic HIGH or LOW level.
Level-Sensitive
The amount of time required for one complete cycle of a periodic event or waveform.
Period
Asynchronous input used to set Q=1 immediately.
PRESET
Delay from the time a signal is applied to the time when the output makes its change.
Propagation Delays (tPLH/tPHL)
Asynchronous input used to set Q=0 immediately.
RESET / CLEAR
The part of a pulse where the logic level is in transition from a LOW to a HIGH.
Rising Edge
Digital circuitry in which the output state of the circuit depends not only on the states of the inputs, but also on the sequence in which they reached their present states.
Sequential Logic
Digital circuit that accepts binary data from some input source and then shifts these data through a chain of flip-flops one bit at a time.
Shift Register
A sequential circuit that advances through several defined states.
State Machines
Counter in which all of the flip-flops are clocked simultaneously.
Synchronous Counter
Input signal to a flip-flop or one-shot that causes the output to change states depending on the conditions of the control signals.
Trigger
