DE 3.1

Question 1

Type of counter in which each flip-flop output serves as the clock input signal for the next flip-flop in the chain.

Answer 1

Asynchronous Counter

Question 2

Flip-flop inputs that can affect the operation of the flip-flop independent of the synchronous and clock inputs.

Answer 2

Asynchronous Inputs

Question 3

Digital signal in the form of a rectangular pulse train or a square wave.

Answer 3

Clock

Question 4

Type of flip-flop in which the D (data) input is the synchronous input.

Answer 4

Clocked D Flip-Flop

Question 5

Type of flip-flop in which inputs J and K are the synchronous inputs.

Answer 5

Clocked J-K Flip-Flop

Question 6

Circuit that contains a NAND gate latch and two steering NAND gates.

Answer 6

D Latch

Question 7

Fraction of the total period that a digital waveform is in the HIGH state. DC = th/T (often expressed as a percentage: %DC = th/Tx100%).

Answer 7

Duty Cycle (DC)

Question 8

Manner in which a flip-flop is activated by a signal transition. A flip-flop may be either a positive- or a negative-edge-triggered flip-flop.

Answer 8

Edge-Sensitive

Question 9

The part of a pulse where the logic level is in transition from a HIGH to a LOW.

Answer 9

Falling Edge

Question 10

A sequential circuit based on a latch whose output changes when its CLOCK input receives a pulse.

Answer 10

Flip-Flop

Question 11

The number of cycles per unit time of a periodic waveform.

Answer 11

Frequency

Question 12

Enabled by a logic HIGH or LOW level.

Answer 12

Level-Sensitive

Question 13

The amount of time required for one complete cycle of a periodic event or waveform.

Answer 13

Period

Question 14

Asynchronous input used to set Q=1 immediately.

Answer 14

PRESET

Question 15

Delay from the time a signal is applied to the time when the output makes its change.

Answer 15

Propagation Delays (tPLH/tPHL)

Question 16

Asynchronous input used to set Q=0 immediately.

Answer 16

RESET / CLEAR

Question 17

The part of a pulse where the logic level is in transition from a LOW to a HIGH.

Answer 17

Rising Edge

Question 18

Digital circuitry in which the output state of the circuit depends not only on the states of the inputs, but also on the sequence in which they reached their present states.

Answer 18

Sequential Logic

Question 19

Digital circuit that accepts binary data from some input source and then shifts these data through a chain of flip-flops one bit at a time.

Answer 19

Shift Register

Question 20

A sequential circuit that advances through several defined states.

Answer 20

State Machines

Question 21

Counter in which all of the flip-flops are clocked simultaneously.

Answer 21

Synchronous Counter

Question 22

Input signal to a flip-flop or one-shot that causes the output to change states depending on the conditions of the control signals.

Answer 22

Trigger