CSO4 MIPS ISA Flashcards
WHAT IS ISA
problem: new hardware requires new software and programming language
solution: hardware abstraction
ISA instruction set architecture does that
it’s an abstraction level between software and hardware
takes the software translates it to instructions that are compatible with CPU so that programs and programming languages are portable
usually ISA is built in with the system and is same for a CPU family (example: a lot of intel CPUs have the same ISA)
STACK-BASED ISA
easy:
-compiler design
-CPU design
no registers only use stack(memory)
for operation:
-push data from top of stack
-execute
-pop to top of stack
this method is slow since we have to constantly interact with memory
ACCUMULATOR-BASED ISA
AND EXTENDED
one register for arithmetic operation
result is saved in same register
every instruction has one of the values in memory
a=b+c
accum = mem[addr(b)]
accum = accum + mem[addr(c)]
variables in memory
no assisting registers
-still slow cause of memory interaction
-too many instructions for one operation
-bottleneck in accumulator
+easy to make compilers
+easy programming
+easy hardware
EXTENDED ACCUMULATOR BASED ISA
improved accumulator based ISA
uses special purpose registers
-for indexing , arithmetic operations
arithmetic operations can be done with only registers as arguments but we still use memory sometimes
there are a couple of registers so no bottlenecking problems
GENERAL-PURPOSE REGISTERS ISAs
Complex Instruction Set Computer(CISC)
can have:
mem- mem
reg-mem
instructions
Reduced Instruction Set Computer(RISC)
can only have reg-reg instructions
use load/store to access memory
BASIC DESIGN PRINCIPLES
- simplicity favors regularity
- smaller is faster(less complex)
- common case fast(make widely used instructions faster)
- good design == good compromises
MIPS PROCESSOR - MEMORY
Microprocessor without Interlocked Pipeline Stages ( focuses on good pipelining)
RISC ISA
1. reserved stack (external cards)
2. stack begin(extends downwards)
—————free space—————-
if stack and data segment cross over we get out of memory exception
3. data segment(stored data, extends upwards)
4. text segment( this is where code is)
5. reserved(by OS for interrupt handlers, i/o interactions)
MIPS ISA
instructions are all 32 bits (4 bytes) in MIPS32 and have 3 operands
predetermined length
we care more about how easily it is used by compilers than programmers
instructions:
-computational
-load/store
-jump/branch
-float
-memory management
-special
3 formats: r, i, j
registers are:
-general purpose
-hi, lo
-pc(program counter)
THE 32 REGISTERS
$zero -> hardwired to value 0 [use not change contents]
$at -> reserved for the assembler [not change contents]
$v0-v1 -> returned values (usually from syscalls)
$a0-a3 -> arguments(usually for syscalls and procedure calls)[preserves procedure call]
$t0-t9 -> temporaries
$s0-s7 -> saved values [preserves procedure call]
$gp -> global pointer
$sp -> stack pointer (basically program counter)
$fp -> frame pointer
$ra -> return address (use for return from procedure calls)
ALIGNMENT
MIPS memory
-array of:
–bytes
–halfwords (2 bytes)
–words (4 bytes)
we access them with the mem address of the first byte
processor has 32 buses and memory is organized in groups of 32 bits hence we can read 32 bits at once
stored items must occupy the first byte of the group
if it starts elsewhere cannot be read in one go
we get unaligned memory error (fix by adding .align 2 after every data segment initialized)
BIG ENDIAN - LITTLE ENDIAN
2 ways we can store and read bytes
most significant byte -> least significant byte (big endian)
least significant byte -> most significant byte (little endian)
usually we prefer little endian
R FORMAT ARITHMETIC INSTRUCTIONS
op code (6) | source reg(5) | reg1(5) | reg2(5) | shift amount(5) used for offset | function type(6)
source is destination
operation between reg1 and reg2
I FORMAT ARITHMETIC INSTRUCTIONS
op code (6) | source register (6) | reg1 (6) | immediate(16)
common case fast
common to use small constants so we put them in immediate
less load instructions
LOAD/STORE (I FORMAT)
immediate field is for mem address
there is options for word halfword and byte
we basically gave register address as base address of an array and immediate field as index
MIPS ARITHMETIC INSTRUCTIONS
add (r)
addi (i) immediate
addiu (i) immediate unsigned
addu (r) unsigned
lui (i) load upper immediate
slt (r) set on less than
slti (i) -//- immediate
sltiu (i) -//- immediate unsigned
sltu (r) -//- unsigned
sub (r) subtract
subu (r)unsigned
div divide
divu -//- unsigned
mult multiply
multu -//- unsigned
mfhi move from hi register
mflo move from lo register
mthi move to hi register
mtlo move to lo register
nor (r) -> not is nor with $zero for simplicity
and (r)
andi (i)
or (r)
ori (i)
xor (r)
xori (i)
