CSC 246 Final Flashcards
Deadlock Avoidance - simplest technique
Simplest and most useful model requires that each process declare the maximum number of resources of each type that it may need
The deadlock-avoidance algorithm dynamically examines the resource-allocation state to ensure that there can never be a circular-wait condition
Resource-allocation state is defined by the number of available and allocated resources, and the maximum demands of the processes
Deadlock avoidance - Safe state (and basic facts)
System is in safe state if there exists a sequence of ALL the processes in the systems such that for each Pi, the resources that Pi can still request can be satisfied by currently available resources + resources held by all the Pj, with j < I
That is:
If Pi resource needs are not immediately available, then Pi can wait until all Pj have finished
When Pj is finished, Pi can obtain needed resources, execute, return allocated resources, and terminate
When Pi terminates, Pi +1 can obtain its needed resources, and so on
Basic facts:
If a system is in safe state ⇒ no deadlocks
If a system is in unsafe state ⇒ possibility of deadlock
Avoidance ⇒ ensure that a system will never enter an unsafe state.
Resource-Allocation Graph Scheme
If Single instance of a resource type, Use a resource-allocation graph
- Claim edge Pi → Rj indicated that process Pj may request resource Rj; represented by a dashed line
- Claim edge converts to request edge when a process requests a resource
- Request edge converted to an assignment edge when the resource is allocated to the process
- When a resource is released by a process, assignment edge reconverts to a claim edge
- Resources must be claimed a priori in the system
Suppose that process Pi requests a resource Rj:
The request can be granted only if converting the request edge to an assignment edge does not result in the formation of a cycle in the resource allocation graph
Banker’s Algorithm
Used Multiple instances of resources, Each process must a priori claim maximum use
Let n = number of processes, and m = number of resources types.
Available
Max
Allocation
Need [i,j] = Max[i,j] – Allocation [i,j]
Request algorithm:
Must check that Request <= need (cannot exceed maximum claim)
Must check that request <= allocation, if not, must wait for other processes to go
Give safety sequence
Deadlock Detection - single instance of resources
Maintain wait-for graph
Nodes are processes
Pi → Pj if Pi is waiting for Pj
Periodically invoke an algorithm that searches for a cycle in the graph. If there is a cycle, there exists a deadlock
An algorithm to detect a cycle in a graph requires an order of n2 operations, where n is the number of vertices in the graph
Deadlock Detection algorithm usage issues
When, and how often, to invoke depends on:
How often a deadlock is likely to occur?
How many processes will need to be rolled back?
one for each disjoint cycle
If detection algorithm is invoked arbitrarily, there may be many cycles in the resource graph and so we would not be able to tell which of the many deadlocked processes “caused” the deadlock.
Recovery from Deadlock: Process Termination (order considerations)
Abort all deadlocked processes
Abort one process at a time until the deadlock cycle is eliminated
In which order should we choose to abort?
- Priority of the process
- How long process has computed, and how much longer to completion
- Resources the process has used
- Resources process needs to complete
- How many processes will need to be terminated
- Is process interactive or batch?
Recovery from Deadlock: Resource Preemption
Selecting a victim – minimize cost
Rollback – return to some safe state, restart process for that state
Starvation – same process may always be picked as victim, include number of rollback in cost factor
Base and Limit Registers (basic definition)
A pair of base and limit registers define the logical address space
CPU must check every memory access generated in user mode to be sure it is between base and limit for that user
Address Binding
Programs on disk, ready to be brought into memory to execute form an input queue
Without support, must be loaded into address 0000
Further, addresses represented in different ways at different stages of a program’s life
- Source code addresses usually symbolic
- Compiled code addresses bind to relocatable addresses
- i.e. “14 bytes from beginning of this module”
- Linker or loader will bind relocatable addresses to absolute addresses
- i.e. 74014
- Each binding maps one address space to another
Address binding of instructions and data to memory addresses can happen at three different stages
-Compile time: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes
-Load time: Must generate relocatable code if memory location is not known at compile time
-Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another
Need hardware support for address maps (e.g., base and limit registers)
Logical vs. Physical Address Space (Concepts)
-The concept of a logical address space that is bound to a separate physical address space is central to proper memory management
Logical address – generated by the CPU; also referred to as virtual address
Physical address – address seen by the memory unit
-Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme
- Logical address space is the set of all logical addresses generated by a program
- Physical address space is the set of all physical addresses generated by a program
Memory Management Unit (MMU)
Hardware device that at run time maps virtual to physical address
To start, consider simple scheme where the value in the relocation register is added to every address generated by a user process at the time it is sent to memory
- Base register now called relocation register
- MS-DOS on Intel 80x86 used 4 relocation registers
The user program deals with logical addresses; it never sees the real physical addresses
- Execution-time binding occurs when reference is made to location in memory
- Logical address bound to physical addresses
Dynamic relocation using relocation register (benefits)
Routine is not loaded until it is called
Better memory-space utilization; unused routine is never loaded
All routines kept on disk in relocatable load format
Useful when large amounts of code are needed to handle infrequently occurring cases
No special support from the operating system is required
Implemented through program design
OS can help by providing libraries to implement dynamic loading
Static vs. Dynamic linking
- Static linking – system libraries and program code combined by the loader into the binary program image
- Dynamic linking –linking postponed until execution time
Small piece of code, stub, used to locate the appropriate memory-resident library routine
Stub replaces itself with the address of the routine, and executes the routine
Operating system checks if routine is in processes’ memory address
-If not in address space, add to address space
Dynamic linking is particularly useful for libraries
-Also known as shared libraries
Swapping
- A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution
- Total physical memory space of processes can exceed physical memory
- Backing store and roll in, roll out
- Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped
- System maintains a ready queue of ready-to-run processes which have memory images on disk
Does the swapped out process need to swap back in to same physical addresses?
- Depends on address binding method
- Plus consider pending I/O to / from process memory space
Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and Windows)
Swapping normally disabled
Started if more than threshold amount of memory allocated
Disabled again once memory demand reduced below threshold
Backing store (swapping)
fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images
Roll out, roll in (swapping)
swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed
Context Switch Time including Swapping
If next processes to be put on CPU is not in memory, need to swap out a process and swap in target process
Context switch time can then be very high
Can reduce if reduced size of memory swapped – by knowing how much memory is really being used
System calls to inform OS of memory use via request_memory() and release_memory()
Other constraints as well on swapping
- Pending I/O – can’t swap out as I/O would occur to wrong process
- Or always transfer I/O to kernel space, then to I/O device
- Known as double buffering, adds overhead
- Standard swapping not used in modern operating systems
- But modified version common
- Swap only when free memory extremely low
Swapping on Mobile Systems
Not typically supported
Instead use other methods to free memory if low
- iOS asks apps to voluntarily relinquish allocated memory
- Read-only data thrown out and reloaded from flash if needed
- Failure to free can result in termination
- Android terminates apps if low free memory, but first writes application state to flash for fast restart
- Both OSes support paging as discussed below
Contiguous Memory Allocation
Contiguous allocation is one early method to allocate resources efficiently
Main memory usually into two partitions:
Resident operating system, usually held in low memory with the interrupt vector
User processes then held in high memory
Each process contained in single contiguous section of memory
Relocation registers used to protect user processes from each other, and from changing operating-system code and data
- Base register contains value of smallest physical address - Limit register contains range of logical addresses - MMU maps logical address dynamically - Can then allow actions such as kernel code being transient and kernel changing size
Multiple-partition allocation
Multiple-partition allocation:
Degree of multiprogramming limited by number of partitions
Variable-partition sizes for efficiency (sized to a given process’ needs)
Hole – block of available memory; holes of various size are scattered throughout memory
When a process arrives, it is allocated memory from a hole large enough to accommodate it
Process exiting frees its partition, adjacent free partitions combined
Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
Dynamic Storage-Allocation Problem:
How to satisfy a request of size n from a list of free holes?
First-fit: Allocate the first hole that is big enough
Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size
Produces the smallest leftover hole
Worst-fit: Allocate the largest hole; must also search entire list
Produces the largest leftover hole (worst choice for speed and storage)
Fragmentation
External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous
Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used
First fit analysis reveals that given N blocks allocated, 0.5 N blocks lost to fragmentation
1/3 may be unusable -> 50-percent rule
compaction
Reduce external fragmentation by compaction
- Shuffle memory contents to place all free memory together in one large block
- Compaction is possible only if relocation is dynamic, and is done at execution time
- I/O problem
- Latch job in memory while it is involved in I/O
- Do I/O only into OS buffers
Now consider that backing store has same fragmentation problems
Paging
Physical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available
-Avoids external fragmentation
-Avoids problem of varying sized memory chunks
Divide physical memory into fixed-sized blocks called frames
-Size is power of 2, between 512 bytes and 16 Mbytes
Divide logical memory into blocks of same size called pages
Keep track of all free frames
To run a program of size N pages, need to find N free frames and load program
Set up a page table to translate logical to physical addresses
Backing store likewise split into pages
Still have Internal fragmentation
Address Translation Scheme (for Paging)
Address generated by CPU is divided into: Page number (p) – used as an index into a page table which contains base address of each page in physical memory Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit
For given logical address space 2^m and page size 2^n
Swapping vs. Paging
In general:
swapping refers to copying an entire process to disk
Paging is a memory mgmt. technique
However, the concept of paging also includes copying data to disk.
Windows has a page file and a swap file (pagefile.sys, swapfile.sys)
To complicate things, a lot of times these terms are used interchangeably!
Implementation of Page Table
Page table is kept in main memory
Page-table base register (PTBR) points to the page table
Page-table length register (PTLR) indicates size of the page table
In this scheme every data/instruction access requires two memory accesses
-One for the page table and one for the data / instruction
The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs)
translation look-aside buffers (TLBs)
special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) used in page tables to solve two memory access problem
Effective Access Time (EAT - Paging)
Hit ratio = α
Hit ratio – percentage of times that a page number is found in the associative registers; ratio related to number of associative registers
Consider α = 80%, 20ns for TLB search, 100ns for memory access
Effective Access Time (EAT) = 0.80 x 100 + 0.20 x 200 = 120ns (THE 200ns is double for 2 memory accesses)
Consider more realistic hit ratio -> α = 99%, 100ns for memory access
EAT = 0.99 x 100 + 0.01 x 200 = 101ns
Valid-invalid (Paging)
Valid-invalid bit attached to each entry in the page table:
- “valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page
- “invalid” indicates that the page is not in the process’ logical address space
- Or use page-table length register (PTLR)
Any violations result in a trap to the kernel
Memory protection implemented by associating protection bit with each frame to indicate if read-only or read-write access is allowed
-Can also add more bits to indicate page execute-only, and so on
Structure of the Page Table (3 different types)
Memory structures for paging can get huge using straight-forward methods
Consider a 32-bit logical address space as on modern computers
Page size of 4 KB (212)
Page table would have 1 million entries (232 / 212)
If each entry is 4 bytes -> 4 MB of physical address space / memory for page table alone
-That amount of memory used to cost a lot
-Don’t want to allocate that contiguously in main memory
Hierarchical Paging*
Hashed Page Tables
Inverted Page Tables*